[PATCH 2/4] ASoC: dt-bindings: fsl,xcvr: Add two PLL clock sources

[Conor Dooley]

On Fri, May 10, 2024 at 10:38:30AM +0800, Shengjiu Wang wrote:
> On Fri, May 10, 2024 at 10:27 AM Shengjiu Wang <shengjiu.wang at gmail.com> wrote:
> >
> > On Fri, May 10, 2024 at 1:14 AM Conor Dooley <conor at kernel.org> wrote:
> > >
> > > On Thu, May 09, 2024 at 10:57:38AM +0800, Shengjiu Wang wrote:
> > > > Add two PLL clock sources, they are the parent clocks of the root clock
> > > > one is for 8kHz series rates, named as 'pll8k', another one is for
> > > > 11kHz series rates, named as 'pll11k'. They are optional clocks,
> > > > if there are such clocks, then the driver can switch between them to
> > > > support more accurate sample rates.
> > > >
> > > > As 'pll8k' and 'pll11k' are optional, then add 'minItems: 4' for
> > > > clocks and clock-names properties.
> > >
> > > Despite the detail given here in the commit message, the series this is
> > > appearing in and one of the driver patches makes me a bit "suspicious"
> > > of this patch. Are these newly added clocks available on all devices, or
> > > just on the imx95, or?
> >
> > These newly added clocks are only available for the imx95 XCVR.
> >
> 
> Looks like I should merge patch1 & 2 together, patch 3 & 3 together. right?

Please, and also add constraints so that the newly added clocks are only
allowed on the imx95.

Thanks,
Conor.
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