[PATCH 1/1] dt-bindings: soc: fsl: cpm_qe: convert network.txt to yaml
Frank Li
Frank.li at nxp.com
Tue Aug 13 02:54:41 AEST 2024
On Mon, Aug 12, 2024 at 12:50:35PM -0400, Frank Li wrote:
> Convert binding doc newwork.txt to yaml format.
>
> HDLC part:
> - Convert to "fsl,ucc-hdlc.yaml".
> - Add missed reg and interrupt property.
> - Update example to pass build.
>
> ethernet part:
> - Convert to net/fsl,cpm-enet.yaml
> - Add 0x in example, which should be hex value
> - Add ref to ethernet-controller.yaml
>
> mdio part:
> - Convert to net/fsl,cpm-mdio.yaml
> - Add 0x in example, which should be hex value
> - Add ref to mdio.yaml
>
> Signed-off-by: Frank Li <Frank.Li at nxp.com>
Sorry, It is sent by accidently. it was already post at
https://lore.kernel.org/imx/20240809175113.3470393-1-Frank.Li@nxp.com/T/#u
Frank
> ---
> This one is quite old. The detail informaiton is limited.
> ---
> .../devicetree/bindings/net/fsl,cpm-enet.yaml | 59 ++++++++
> .../devicetree/bindings/net/fsl,cpm-mdio.yaml | 55 +++++++
> .../bindings/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml | 140 ++++++++++++++++++
> .../bindings/soc/fsl/cpm_qe/network.txt | 130 ----------------
> 4 files changed, 254 insertions(+), 130 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/net/fsl,cpm-enet.yaml
> create mode 100644 Documentation/devicetree/bindings/net/fsl,cpm-mdio.yaml
> create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml
> delete mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
>
> diff --git a/Documentation/devicetree/bindings/net/fsl,cpm-enet.yaml b/Documentation/devicetree/bindings/net/fsl,cpm-enet.yaml
> new file mode 100644
> index 0000000000000..da836477e8bad
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/fsl,cpm-enet.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/fsl,cpm-enet.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Network for cpm enet
> +
> +maintainers:
> + - Frank Li <Frank.Li at nxp.com>
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - fsl,cpm1-scc-enet
> + - fsl,cpm2-scc-enet
> + - fsl,cpm1-fec-enet
> + - fsl,cpm2-fcc-enet
> + - fsl,qe-enet
> + - items:
> + - enum:
> + - fsl,mpc8272-fcc-enet
> + - const: fsl,cpm2-fcc-enet
> +
> + reg:
> + minItems: 1
> + maxItems: 3
> +
> + interrupts:
> + maxItems: 1
> +
> + fsl,cpm-command:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: cpm command
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +allOf:
> + - $ref: ethernet-controller.yaml
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + ethernet at 11300 {
> + compatible = "fsl,mpc8272-fcc-enet",
> + "fsl,cpm2-fcc-enet";
> + reg = <0x11300 0x20 0x8400 0x100 0x11390 1>;
> + local-mac-address = [ 00 00 00 00 00 00 ];
> + interrupts = <20 8>;
> + interrupt-parent = <&pic>;
> + phy-handle = <&phy0>;
> + fsl,cpm-command = <0x12000300>;
> + };
> +
> diff --git a/Documentation/devicetree/bindings/net/fsl,cpm-mdio.yaml b/Documentation/devicetree/bindings/net/fsl,cpm-mdio.yaml
> new file mode 100644
> index 0000000000000..b1791a3c490e2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/fsl,cpm-mdio.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/fsl,cpm-mdio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale CPM MDIO Device
> +
> +maintainers:
> + - Frank Li <Frank.Li at nxp.com>
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - fsl,pq1-fec-mdio
> + - fsl,cpm2-mdio-bitbang
> + - items:
> + - const: fsl,mpc8272ads-mdio-bitbang
> + - const: fsl,mpc8272-mdio-bitbang
> + - const: fsl,cpm2-mdio-bitbang
> +
> + reg:
> + maxItems: 1
> +
> + fsl,mdio-pin:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: pin of port C controlling mdio data
> +
> + fsl,mdc-pin:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: pin of port C controlling mdio clock
> +
> +required:
> + - compatible
> + - reg
> +
> +allOf:
> + - $ref: mdio.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + mdio at 10d40 {
> + compatible = "fsl,mpc8272ads-mdio-bitbang",
> + "fsl,mpc8272-mdio-bitbang",
> + "fsl,cpm2-mdio-bitbang";
> + reg = <0x10d40 0x14>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + fsl,mdio-pin = <12>;
> + fsl,mdc-pin = <13>;
> + };
> +
> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml
> new file mode 100644
> index 0000000000000..64ffbf75dd9d2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml
> @@ -0,0 +1,140 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: High-Level Data Link Control(HDLC)
> +
> +description: HDLC part in Universal communication controllers (UCCs)
> +
> +maintainers:
> + - Frank Li <Frank.Li at nxp.com>
> +
> +properties:
> + compatible:
> + const: fsl,ucc-hdlc
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> + rx-clock-name:
> + $ref: /schemas/types.yaml#/definitions/string
> + oneOf:
> + - pattern: "^brg([0-9]|1[0-6])$"
> + - pattern: "^clk([0-9]|1[0-9]|2[0-4])$"
> +
> + tx-clock-name:
> + $ref: /schemas/types.yaml#/definitions/string
> + oneOf:
> + - pattern: "^brg([0-9]|1[0-6])$"
> + - pattern: "^clk([0-9]|1[0-9]|2[0-4])$"
> +
> + fsl,tdm-interface:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description: Specify that hdlc is based on tdm-interface
> +
> + fsl,rx-sync-clock:
> + $ref: /schemas/types.yaml#/definitions/string
> + description: rx-sync
> + enum:
> + - none
> + - rsync_pin
> + - brg9
> + - brg10
> + - brg11
> + - brg13
> + - brg14
> + - brg15
> +
> + fsl,tx-sync-clock:
> + $ref: /schemas/types.yaml#/definitions/string
> + description: tx-sync
> + enum:
> + - none
> + - tsync_pin
> + - brg9
> + - brg10
> + - brg11
> + - brg13
> + - brg14
> + - brg15
> +
> + fsl,tdm-framer-type:
> + $ref: /schemas/types.yaml#/definitions/string
> + description: required for tdm interface
> + enum: [e1, t1]
> +
> + fsl,tdm-id:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: number of TDM ID
> +
> + fsl,tx-timeslot-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + required for tdm interface.
> + time slot mask for TDM operation. Indicates which time
> + slots used for transmitting and receiving.
> +
> + fsl,rx-timeslot-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + required for tdm interface.
> + time slot mask for TDM operation. Indicates which time
> + slots used for transmitting and receiving.
> +
> + fsl,siram-entry-id:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + required for tdm interface
> + Must be 0,2,4...64. the number of TDM entry.
> +
> + fsl,tdm-internal-loopback:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + optional for tdm interface
> + Internal loopback connecting on TDM layer.
> +
> + fsl,hmask:
> + $ref: /schemas/types.yaml#/definitions/uint16
> + description: |
> + HDLC address recognition. Set to zero to disable
> + address filtering of packets:
> + fsl,hmask = /bits/ 16 <0x0000>;
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + communication at 2000 {
> + compatible = "fsl,ucc-hdlc";
> + reg = <0x2000 0x200>;
> + rx-clock-name = "clk8";
> + tx-clock-name = "clk9";
> + fsl,rx-sync-clock = "rsync_pin";
> + fsl,tx-sync-clock = "tsync_pin";
> + fsl,tx-timeslot-mask = <0xfffffffe>;
> + fsl,rx-timeslot-mask = <0xfffffffe>;
> + fsl,tdm-framer-type = "e1";
> + fsl,tdm-id = <0>;
> + fsl,siram-entry-id = <0>;
> + fsl,tdm-interface;
> + };
> +
> + - |
> + communication at 2000 {
> + compatible = "fsl,ucc-hdlc";
> + reg = <0x2000 0x200>;
> + rx-clock-name = "brg1";
> + tx-clock-name = "brg1";
> + };
> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> deleted file mode 100644
> index 6d2dd8a31482a..0000000000000
> --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
> +++ /dev/null
> @@ -1,130 +0,0 @@
> -* Network
> -
> -Currently defined compatibles:
> -- fsl,cpm1-scc-enet
> -- fsl,cpm2-scc-enet
> -- fsl,cpm1-fec-enet
> -- fsl,cpm2-fcc-enet (third resource is GFEMR)
> -- fsl,qe-enet
> -
> -Example:
> -
> - ethernet at 11300 {
> - compatible = "fsl,mpc8272-fcc-enet",
> - "fsl,cpm2-fcc-enet";
> - reg = <11300 20 8400 100 11390 1>;
> - local-mac-address = [ 00 00 00 00 00 00 ];
> - interrupts = <20 8>;
> - interrupt-parent = <&PIC>;
> - phy-handle = <&PHY0>;
> - fsl,cpm-command = <12000300>;
> - };
> -
> -* MDIO
> -
> -Currently defined compatibles:
> -fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
> -fsl,cpm2-mdio-bitbang (reg is port C registers)
> -
> -Properties for fsl,cpm2-mdio-bitbang:
> -fsl,mdio-pin : pin of port C controlling mdio data
> -fsl,mdc-pin : pin of port C controlling mdio clock
> -
> -Example:
> - mdio at 10d40 {
> - compatible = "fsl,mpc8272ads-mdio-bitbang",
> - "fsl,mpc8272-mdio-bitbang",
> - "fsl,cpm2-mdio-bitbang";
> - reg = <10d40 14>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - fsl,mdio-pin = <12>;
> - fsl,mdc-pin = <13>;
> - };
> -
> -* HDLC
> -
> -Currently defined compatibles:
> -- fsl,ucc-hdlc
> -
> -Properties for fsl,ucc-hdlc:
> -- rx-clock-name
> -- tx-clock-name
> - Usage: required
> - Value type: <string>
> - Definition : Must be "brg1"-"brg16" for internal clock source,
> - Must be "clk1"-"clk24" for external clock source.
> -
> -- fsl,tdm-interface
> - Usage: optional
> - Value type: <empty>
> - Definition : Specify that hdlc is based on tdm-interface
> -
> -The property below is dependent on fsl,tdm-interface:
> -- fsl,rx-sync-clock
> - Usage: required
> - Value type: <string>
> - Definition : Must be "none", "rsync_pin", "brg9-11" and "brg13-15".
> -
> -- fsl,tx-sync-clock
> - Usage: required
> - Value type: <string>
> - Definition : Must be "none", "tsync_pin", "brg9-11" and "brg13-15".
> -
> -- fsl,tdm-framer-type
> - Usage: required for tdm interface
> - Value type: <string>
> - Definition : "e1" or "t1".Now e1 and t1 are used, other framer types
> - are not supported.
> -
> -- fsl,tdm-id
> - Usage: required for tdm interface
> - Value type: <u32>
> - Definition : number of TDM ID
> -
> -- fsl,tx-timeslot-mask
> -- fsl,rx-timeslot-mask
> - Usage: required for tdm interface
> - Value type: <u32>
> - Definition : time slot mask for TDM operation. Indicates which time
> - slots used for transmitting and receiving.
> -
> -- fsl,siram-entry-id
> - Usage: required for tdm interface
> - Value type: <u32>
> - Definition : Must be 0,2,4...64. the number of TDM entry.
> -
> -- fsl,tdm-internal-loopback
> - usage: optional for tdm interface
> - value type: <empty>
> - Definition : Internal loopback connecting on TDM layer.
> -- fsl,hmask
> - usage: optional
> - Value type: <u16>
> - Definition: HDLC address recognition. Set to zero to disable
> - address filtering of packets:
> - fsl,hmask = /bits/ 16 <0x0000>;
> -
> -Example for tdm interface:
> -
> - ucc at 2000 {
> - compatible = "fsl,ucc-hdlc";
> - rx-clock-name = "clk8";
> - tx-clock-name = "clk9";
> - fsl,rx-sync-clock = "rsync_pin";
> - fsl,tx-sync-clock = "tsync_pin";
> - fsl,tx-timeslot-mask = <0xfffffffe>;
> - fsl,rx-timeslot-mask = <0xfffffffe>;
> - fsl,tdm-framer-type = "e1";
> - fsl,tdm-id = <0>;
> - fsl,siram-entry-id = <0>;
> - fsl,tdm-interface;
> - };
> -
> -Example for hdlc without tdm interface:
> -
> - ucc at 2000 {
> - compatible = "fsl,ucc-hdlc";
> - rx-clock-name = "brg1";
> - tx-clock-name = "brg1";
> - };
> --
> 2.34.1
>
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