[PATCH v9 02/14] PCI: Export PCIe link retrain timeout
Maciej W. Rozycki
macro at orcam.me.uk
Mon Jun 12 03:19:19 AEST 2023
Convert LINK_RETRAIN_TIMEOUT from jiffies to milliseconds, accordingly
rename to PCIE_LINK_RETRAIN_TIMEOUT_MS, and make available via "pci.h"
for PCI drivers to use. Use in `pcie_wait_for_link_delay'.
Signed-off-by: Maciej W. Rozycki <macro at orcam.me.uk>
---
Changes from v8:
- Convert LINK_RETRAIN_TIMEOUT from jiffies to milliseconds, rename it to
PCIE_LINK_RETRAIN_TIMEOUT_MS rather than PCIE_LINK_RETRAIN_TIMEOUT, and
adjust its use accordingly.
- Also replace hardcoded 1000 in `pcie_wait_for_link_delay'.
- Correct the change heading, s/PCI/PCIe/ for the link reference.
Changes from v7:
- Reorder from 1/7.
No change from v6.
No change from v5.
New change in v5.
---
drivers/pci/pci.c | 2 +-
drivers/pci/pci.h | 2 ++
drivers/pci/pcie/aspm.c | 4 +---
3 files changed, 4 insertions(+), 4 deletions(-)
linux-pcie-link-retrain-timeout.diff
Index: linux-macro/drivers/pci/pci.c
===================================================================
--- linux-macro.orig/drivers/pci/pci.c
+++ linux-macro/drivers/pci/pci.c
@@ -4860,7 +4860,7 @@ static int pci_pm_reset(struct pci_dev *
static bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active,
int delay)
{
- int timeout = 1000;
+ int timeout = PCIE_LINK_RETRAIN_TIMEOUT_MS;
bool ret;
u16 lnk_status;
Index: linux-macro/drivers/pci/pci.h
===================================================================
--- linux-macro.orig/drivers/pci/pci.h
+++ linux-macro/drivers/pci/pci.h
@@ -11,6 +11,8 @@
#define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */
+#define PCIE_LINK_RETRAIN_TIMEOUT_MS 1000
+
extern const unsigned char pcie_link_speed[];
extern bool pci_early_dump;
Index: linux-macro/drivers/pci/pcie/aspm.c
===================================================================
--- linux-macro.orig/drivers/pci/pcie/aspm.c
+++ linux-macro/drivers/pci/pcie/aspm.c
@@ -90,8 +90,6 @@ static const char *policy_str[] = {
[POLICY_POWER_SUPERSAVE] = "powersupersave"
};
-#define LINK_RETRAIN_TIMEOUT HZ
-
/*
* The L1 PM substate capability is only implemented in function 0 in a
* multi function device.
@@ -213,7 +211,7 @@ static bool pcie_retrain_link(struct pci
}
/* Wait for link training end. Break out after waiting for timeout */
- end_jiffies = jiffies + LINK_RETRAIN_TIMEOUT;
+ end_jiffies = jiffies + msecs_to_jiffies(PCIE_LINK_RETRAIN_TIMEOUT_MS);
do {
pcie_capability_read_word(parent, PCI_EXP_LNKSTA, ®16);
if (!(reg16 & PCI_EXP_LNKSTA_LT))
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