[PATCH] powerpc/6xx: set High BAT Enable flag on G2 cores

Matthias Schiffer matthias.schiffer at ew.tq-group.com
Fri Dec 22 19:34:06 AEDT 2023

On Fri, 2023-12-22 at 12:16 +1100, Michael Ellerman wrote:
> Matthias Schiffer <matthias.schiffer at ew.tq-group.com> writes:
> > MMU_FTR_USE_HIGH_BATS is set for G2-based cores (G2_LE, e300cX), but the
> > high BATs need to be enabled in HID2 to work. Add register definitions
> > and introduce a G2 variant of __setup_cpu_603.
> > 
> > This fixes boot on CPUs like the MPC5200B with STRICT_KERNEL_RWX enabled.
> Nice find.
> Minor nit on naming. The 32-bit code mostly uses the numeric names, eg.
> 603, 603e, 604 etc. Can we stick with that, rather than using "G2"?
> Wikipedia says G2 == 603e. But looking at your patch you're not changing
> all the 603e cores, so I guess it's not that clear cut?
> If using "G2" makes the most sense then it would be nice to update
> Documentation/arch/powerpc/cpu_families.rst to mention it (not asking
> you to do it necessarily, more a note for us).

According to the 603e manual I could find (MPR603EUM-01), the HID2 register does not exist in the
original 603e cores - the register was only added by Freescale in its extended implementations.

The manual of the MPC5200 calls its core an "e300", but that seems to be an older implementation
than the "e300c[1-4]" cores described in the "e300" manual. I'm not sure if "e300" (without "cX")
and "G2_LE" are synonymous.

So AFAIR either "G2" or "e300" could be an appropriate name for the family, but which is better I
can't say.


> cheers

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