Writing not working to CPLD/FPGA.

[Christophe Leroy]

Hi Steve,

Le 11/11/2022 à 01:45, Steven J. Hill a écrit :
> Hello.
> 
> My platform is a 7447A with Marvell GT64260 bridge chip. I have currently
> got the kernel upgraded to v3.12 (started from v2.6.26) and only have one
> more piece to get working that has never worked. There is a CPLD on the
> board. It maps in just fine and I can read the registers without issue.
> However, none of my writes work. In the bootloader, I can write the CPLD
> registers without issue. The preboot code in 'arch/powerpc/boot' can also
> write the CPLD registers. So, write access stops working once the kernel is
> booted. Using _PAGE_NO_CACHE with ioremap_prot() and other flags does not
> work. Has anyone else ever encountered something similar behavior in the
> past? Please CC: me. I am not subscribed to the list. Thanks in advance.
> 


It's a bit difficult to answer without knowing more about your setup.

First of all, kernel 3.12 is prehistoric. Have you tried with latest 
kernel, or at least with one of the long term support releases (see 
https://www.kernel.org/category/releases.html) ?

When you say none of your writes work, what does that mean exactly ? Do 
you get any error, an Oops, or is it blindly ignored ?

How do you write to the register, do you use the IO accessors out_be32() 
or equivalent ? If you just dereference a volatile pointer, please read 
https://www.kernel.org/doc/html/latest/process/volatile-considered-harmful.html

I don't think _PAGE_NO_CACHE is enough, you also need _PAGE_GUARDED. Use 
function ioremap(), see 
https://elixir.bootlin.com/linux/v3.12.74/source/arch/powerpc/mm/pgtable_32.c#L129

Christophe