[PATCH] ASoC: fsl_sai: Enable MCTL_MCLK_EN bit for master mode

[Shengjiu Wang]

On Thu, May 19, 2022 at 9:23 PM Fabio Estevam <festevam at gmail.com> wrote:

> Hi Shengjiu,
>
> On Thu, May 19, 2022 at 9:49 AM Shengjiu Wang <shengjiu.wang at nxp.com>
> wrote:
>
> > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
> > index fa950dde5310..dae16a14f177 100644
> > --- a/sound/soc/fsl/fsl_sai.c
> > +++ b/sound/soc/fsl/fsl_sai.c
> > @@ -437,6 +437,12 @@ static int fsl_sai_set_bclk(struct snd_soc_dai
> *dai, bool tx, u32 freq)
> >                                    FSL_SAI_CR2_DIV_MASK |
> FSL_SAI_CR2_BYP,
> >                                    savediv / 2 - 1);
> >
> > +       if (sai->soc_data->max_register >= FSL_SAI_MCTL) {
>
> Isn't it a bit fragile to take this decision based on the number of
> SAI registers in the SoC?
>
> What about adding a specific field in soc_data for such a purpose?
>

'max_register' is one field in the soc_data,  until now in our internal
usage it seems ok for using this condition.

Thanks.

Best regards
Wang shengjiu
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