[PATCH 1/6] powerpc: Add ZERO_GPRS macros for register clears
Christophe Leroy
christophe.leroy at csgroup.eu
Wed Jun 1 17:45:40 AEST 2022
Le 01/06/2022 à 07:48, Rohan McLure a écrit :
> [You don't often get email from rmclure at linux.ibm.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> Macros for restoring saving registers to and from the stack exist.
> Provide a macro for simply zeroing a range of gprs, or an individual
> gpr.
>
> Signed-off-by: Rohan McLure <rmclure at linux.ibm.com>
> ---
> arch/powerpc/include/asm/ppc_asm.h | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
> index 4dea2d963738..3fb37a9767f7 100644
> --- a/arch/powerpc/include/asm/ppc_asm.h
> +++ b/arch/powerpc/include/asm/ppc_asm.h
> @@ -33,6 +33,19 @@
> .endr
> .endm
>
> +/*
> + * Simplification of OP_REGS, for an arbitrary right hand operand.
> + *
> + * op reg, rhs
You call it "BINOP" but it is rare to have a binary operation with only
two operands. Another name could be more appropriate ?
Or keep it as BINOP if you see another future use ? In that case have
the 3 operands, then 'li r, 0' is same as 'addi r, 0, 0'
> + */
> +.macro BINOP_REGS op, rhs, start, end
> + .Lreg=\start
> + .rept (\end - \start + 1)
> + \op .Lreg, \rhs
> + .Lreg=.Lreg+1
> + .endr
> +.endm
> +
> /*
> * Macros for storing registers into and loading registers from
> * exception frames.
> @@ -49,6 +62,10 @@
> #define REST_NVGPRS(base) REST_GPRS(13, 31, base)
> #endif
>
> +#define ZERO_GPRS(start, end) BINOP_REGS li, 0, start, end
> +#define ZERO_NVGPRS() ZERO_GPRS(14, 31)
> +#define ZERO_GPR(n) ZERO_GPRS(n, n)
Maybe it would be more explicit to use ZEROIZE_
> +
> #define SAVE_GPR(n, base) SAVE_GPRS(n, n, base)
> #define REST_GPR(n, base) REST_GPRS(n, n, base)
>
> --
> 2.34.1
>
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