[PATCH] powerpc/32: Clear volatile regs on syscall exit
Segher Boessenkool
segher at kernel.crashing.org
Thu Feb 24 10:27:39 AEDT 2022
On Wed, Feb 23, 2022 at 09:48:09PM +0100, Gabriel Paubert wrote:
> On Wed, Feb 23, 2022 at 06:11:36PM +0100, Christophe Leroy wrote:
> > + /* Zero volatile regs that may contain sensitive kernel data */
> > + li r0,0
> > + li r4,0
> > + li r5,0
> > + li r6,0
> > + li r7,0
> > + li r8,0
> > + li r9,0
> > + li r10,0
> > + li r11,0
> > + li r12,0
> > + mtctr r0
> > + mtxer r0
>
> Here, I'm almost sure that on some processors, it would be better to
> separate mtctr form mtxer. mtxer is typically very expensive (pipeline
> flush) but I don't know what's the best ordering for the average core.
mtxer is cheaper than mtctr on many cores :-)
On p9 mtxer is cracked into two latency 3 ops (which run in parallel).
While mtctr has latency 5.
On p8 mtxer was horrible indeed (but nothing near as bad as a pipeline
flush).
Segher
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