[PATCH] powerpc: warn on emulation of dcbz instruction

[David Laight]

From: Christophe Leroy
> Sent: 16 September 2021 08:24
> 
> Le 16/09/2021 à 09:16, Benjamin Herrenschmidt a écrit :
> > On Thu, 2021-09-16 at 17:15 +1000, Benjamin Herrenschmidt wrote:
> >> On Wed, 2021-09-15 at 16:31 +0200, Christophe Leroy wrote:
> >>> dcbz instruction shouldn't be used on non-cached memory. Using
> >>> it on non-cached memory can result in alignment exception and
> >>> implies a heavy handling.
> >>>
> >>> Instead of silentely emulating the instruction and resulting in
> >>> high
> >>> performance degradation, warn whenever an alignment exception is
> >>> taken due to dcbz, so that the user is made aware that dcbz
> >>> instruction has been used unexpectedly.
> >>>
> >>> Reported-by: Stan Johnson <userm57 at yahoo.com>
> >>> Cc: Finn Thain <fthain at linux-m68k.org>
> >>> Signed-off-by: Christophe Leroy <christophe.leroy at csgroup.eu>
> >>> ---
> >>>   arch/powerpc/kernel/align.c | 1 +
> >>>   1 file changed, 1 insertion(+)
> >>>
> >>> diff --git a/arch/powerpc/kernel/align.c
> >>> b/arch/powerpc/kernel/align.c
> >>> index bbb4181621dd..adc3a4a9c6e4 100644
> >>> --- a/arch/powerpc/kernel/align.c
> >>> +++ b/arch/powerpc/kernel/align.c
> >>> @@ -349,6 +349,7 @@ int fix_alignment(struct pt_regs *regs)
> >>>   		if (op.type != CACHEOP + DCBZ)
> >>>   			return -EINVAL;
> >>>   		PPC_WARN_ALIGNMENT(dcbz, regs);
> >>> +		WARN_ON_ONCE(1);
> >>
> >> This is heavy handed ... It will be treated as an oops by various
> >> things uselessly spit out a kernel backtrace. Isn't
> >> PPC_WARN_ALIGNMENT
> >> enough ?
> 
> 
> PPC_WARN_ALIGNMENT() only warns if explicitely activated, I want to
> catch uses on 'dcbz' on non-cached memory all the time as they are most
> often the result of using memset() instead of memset_io().
> 
> >
> > Ah I saw your other one about fbdev...  Ok what about you do that in a
> > if (!user_mode(regs)) ?
> 
> Yes I can do WARN_ON_ONCE(!user_mode(regs)); instead.
> 
> > Indeed the kernel should not do that.
> 
> Does userspace accesses non-cached memory directly ?

It probably can if a driver mmaps PCI space directly into user space.
That certainly works on x86-64.

	David

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