[PATCH v2 07/10] powerpc/bpf ppc32: Fix ALU32 BPF_ARSH operation
Christophe Leroy
christophe.leroy at csgroup.eu
Wed Oct 6 15:56:23 AEDT 2021
Le 05/10/2021 à 22:25, Naveen N. Rao a écrit :
> Correct the destination register used for ALU32 BPF_ARSH operation.
>
> Fixes: 51c66ad849a703 ("powerpc/bpf: Implement extended BPF on PPC32")
> Signed-off-by: Naveen N. Rao <naveen.n.rao at linux.vnet.ibm.com>
Reviewed-by: Christophe Leroy <christophe.leroy at csgroup.eu>
> ---
> arch/powerpc/net/bpf_jit_comp32.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/net/bpf_jit_comp32.c b/arch/powerpc/net/bpf_jit_comp32.c
> index a74d52204f8da2..519ecb9ab67266 100644
> --- a/arch/powerpc/net/bpf_jit_comp32.c
> +++ b/arch/powerpc/net/bpf_jit_comp32.c
> @@ -625,7 +625,7 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *
> EMIT(PPC_RAW_LI(dst_reg_h, 0));
> break;
> case BPF_ALU | BPF_ARSH | BPF_X: /* (s32) dst >>= src */
> - EMIT(PPC_RAW_SRAW(dst_reg_h, dst_reg, src_reg));
> + EMIT(PPC_RAW_SRAW(dst_reg, dst_reg, src_reg));
> break;
> case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */
> bpf_set_seen_register(ctx, tmp_reg);
>
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