[PATCH v3 0/9] Speedup mremap on ppc64
Aneesh Kumar K.V
aneesh.kumar at linux.ibm.com
Tue Mar 30 17:07:43 AEDT 2021
This patchset enables MOVE_PMD/MOVE_PUD support on power. This requires
the platform to support updating higher-level page tables without
updating page table entries. This also needs to invalidate the Page Walk
Cache on architecture supporting the same.
Changes from v2:
* switch from using mmu_gather to flush_pte_tlb_pwc_range()
Changes from v1:
* Rebase to recent upstream
* Fix build issues with tlb_gather_mmu changes
Aneesh Kumar K.V (9):
selftest/mremap_test: Update the test to handle pagesize other than 4K
selftest/mremap_test: Avoid crash with static build
mm/mremap: Use pmd/pud_poplulate to update page table entries
powerpc/mm/book3s64: Fix possible build error
powerpc/mm/book3s64: Update tlb flush routines to take a page walk
cache flush argument
mm/mremap: Use range flush that does TLB and page walk cache flush
mm/mremap: Move TLB flush outside page table lock
mm/mremap: Allow arch runtime override
powerpc/mm: Enable move pmd/pud
arch/arc/include/asm/tlb.h | 5 +
arch/arm64/include/asm/tlb.h | 6 +
.../include/asm/book3s/64/tlbflush-radix.h | 19 +--
arch/powerpc/include/asm/book3s/64/tlbflush.h | 30 ++++-
arch/powerpc/include/asm/tlb.h | 6 +
arch/powerpc/mm/book3s64/radix_hugetlbpage.c | 4 +-
arch/powerpc/mm/book3s64/radix_tlb.c | 49 ++++----
arch/powerpc/platforms/Kconfig.cputype | 2 +
arch/x86/include/asm/tlb.h | 5 +
mm/mremap.c | 40 ++++--
tools/testing/selftests/vm/mremap_test.c | 118 ++++++++++--------
11 files changed, 187 insertions(+), 97 deletions(-)
--
2.30.2
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