Errant readings on LM81 with T2080 SoC
Chris Packham
Chris.Packham at alliedtelesis.co.nz
Wed Mar 10 13:19:41 AEDT 2021
On 9/03/21 9:27 am, Chris Packham wrote:
> On 8/03/21 5:59 pm, Guenter Roeck wrote:
>> Other than that, the only other real idea I have would be to monitor
>> the i2c bus.
> I am in the fortunate position of being able to go into the office and
> even happen to have the expensive scope at the moment. Now I just need
> to find a tame HW engineer so I don't burn myself trying to attach the
> probes.
One thing I see on the scope is that when there is a CPU load there
appears to be some clock stretching going on (SCL is held low some
times). I don't see it without the CPU load. It's hard to correlate a
clock stretching event with a bad read or error but it is one area where
the SMBUS spec has a maximum that might cause the device to give up waiting.
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