[FSL P50xx] IRQ issues
Nicholas Piggin
npiggin at gmail.com
Tue Jul 6 14:26:01 AEST 2021
Excerpts from Nicholas Piggin's message of July 6, 2021 9:36 am:
> Excerpts from Christian Zigotzky's message of July 6, 2021 4:49 am:
>> Hi All,
>>
>> Our FSL P50xx machines don't boot anymore because of IRQ issues. [1]
>>
>> Please check the IRQ changes in the latest PowerPC updates 5.14-1. [2]
>>
>> Thanks,
>> Christian
>>
>> [1]
>> https://forum.hyperion-entertainment.com/download/file.php?id=2592&mode=view
>> [2]
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=019b3fd94ba73d3ac615f0537440b81f129821f6
>
> This looks like mtmsrd in the 64e code. I think this should fix it.
>
> QEMU does not seem to trap on this, maybe something to improve.
With a patch to qemu to make it take an illegal instruction on mtmsrd I
can reproduce basically what you have, and this patch makes it work. I
think this is the best short term fix.
Thanks,
Nick
>
> Thanks,
> Nick
> --
>
> diff --git a/arch/powerpc/kernel/interrupt_64.S b/arch/powerpc/kernel/interrupt_64.S
> index 4063e8a3f704..d4212d2ff0b5 100644
> --- a/arch/powerpc/kernel/interrupt_64.S
> +++ b/arch/powerpc/kernel/interrupt_64.S
> @@ -311,9 +311,13 @@ END_BTB_FLUSH_SECTION
> * trace_hardirqs_off().
> */
> li r11,IRQS_ALL_DISABLED
> - li r12,-1 /* Set MSR_EE and MSR_RI */
> stb r11,PACAIRQSOFTMASK(r13)
> +#ifdef CONFIG_PPC_BOOK3S
> + li r12,-1 /* Set MSR_EE and MSR_RI */
> mtmsrd r12,1
> +#else
> + wrteei 1
> +#endif
>
> /* Calling convention has r9 = orig r0, r10 = regs */
> mr r9,r0
>
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