[PATCH] powerpc/powernv: Enable HAIL (HV AIL) for ISA v3.1 processors

[Nicholas Piggin]

Excerpts from Cédric Le Goater's message of April 2, 2021 4:10 pm:
> On 4/2/21 4:41 AM, Nicholas Piggin wrote:
>> Starting with ISA v3.1, LPCR[AIL] no longer controls the interrupt
>> mode for HV=1 interrupts. Instead, a new LPCR[HAIL] bit is defined
>> which behaves like AIL=3 for HV interrupts when set.
> 
> Will QEMU need an update ? 

Yes you're right it will, we need to do that.

Thanks,
Nick