[PATCH] powerpc/perf: Exclude pmc5/6 from the irrelevant PMU group constraints

[Michael Ellerman]

Athira Rajeev <atrajeev at linux.vnet.ibm.com> writes:
> PMU counter support functions enforces event constraints for group of
> events to check if all events in a group can be monitored. Incase of
> event codes using PMC5 and PMC6 ( 500fa and 600f4 respectively ),
> not all constraints are applicable, say the threshold or sample bits.
> But current code includes pmc5 and pmc6 in some group constraints (like
> IC_DC Qualifier bits) which is actually not applicable and hence results
> in those events not getting counted when scheduled along with group of
> other events. Patch fixes this by excluding PMC5/6 from constraints
> which are not relevant for it.
>
> Fixes: 7ffd948 ('powerpc/perf: factor out power8 pmu functions')
> Signed-off-by: Athira Rajeev <atrajeev at linux.vnet.ibm.com>
> ---
>  arch/powerpc/perf/isa207-common.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c
> index 964437a..186fad8 100644
> --- a/arch/powerpc/perf/isa207-common.c
> +++ b/arch/powerpc/perf/isa207-common.c
> @@ -288,6 +288,9 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp)
>  
>  		mask  |= CNST_PMC_MASK(pmc);
>  		value |= CNST_PMC_VAL(pmc);
> +
> +		if (pmc >= 5)
> +			goto ebb_bhrb;

This is fairly subtle. Can you please put a block comment above the if
explaining in a few lines what's going on.

cheers