[PATCH v4 18/25] nvdimm/ocxl: Add an IOCTL to report controller statistics

Alastair D'Silva alastair at d-silva.org
Fri Mar 27 18:11:55 AEDT 2020


The controller can report a number of statistics that are useful
in evaluating the performance and reliability of the card.

This patch exposes this information via an IOCTL.

Signed-off-by: Alastair D'Silva <alastair at d-silva.org>
---
 drivers/nvdimm/ocxl/main.c     | 220 +++++++++++++++++++++++++++++++++
 include/uapi/nvdimm/ocxlpmem.h |  21 ++++
 2 files changed, 241 insertions(+)

diff --git a/drivers/nvdimm/ocxl/main.c b/drivers/nvdimm/ocxl/main.c
index d0db358ded43..0040fc09cceb 100644
--- a/drivers/nvdimm/ocxl/main.c
+++ b/drivers/nvdimm/ocxl/main.c
@@ -713,6 +713,221 @@ static int ioctl_controller_dump_complete(struct ocxlpmem *ocxlpmem)
 				    GLOBAL_MMIO_HCI_CONTROLLER_DUMP_COLLECTED);
 }
 
+/**
+ * controller_stats_header_parse() - Parse the first 64 bits of the controller stats admin command response
+ * @ocxlpmem: the device metadata
+ * @length: out, returns the number of bytes in the response (excluding the 64 bit header)
+ */
+static int controller_stats_header_parse(struct ocxlpmem *ocxlpmem,
+					 u32 *length)
+{
+	int rc;
+	u64 val;
+
+	u16 data_identifier;
+	u32 data_length;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
+				     ocxlpmem->admin_command.data_offset,
+				     OCXL_LITTLE_ENDIAN, &val);
+	if (rc)
+		return rc;
+
+	data_identifier = val >> 48;
+	data_length = val & 0xFFFFFFFF;
+
+	if (data_identifier != 0x4353) { // 'CS'
+		dev_err(&ocxlpmem->dev,
+			"Bad data identifier for error log data, expected 'CS', got '%2s' (%#x), data_length=%u\n",
+			(char *)&data_identifier,
+			(unsigned int)data_identifier, data_length);
+		return -EINVAL;
+	}
+
+	*length = data_length;
+	return 0;
+}
+
+static int ioctl_controller_stats(struct ocxlpmem *ocxlpmem,
+				  struct ioctl_ocxlpmem_controller_stats __user *uarg)
+{
+	struct ioctl_ocxlpmem_controller_stats args;
+	u32 length;
+	int rc;
+	u64 val;
+
+	memset(&args, '\0', sizeof(args));
+
+	mutex_lock(&ocxlpmem->admin_command.lock);
+
+	rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu,
+				      ocxlpmem->admin_command.request_offset + 0x08,
+				      OCXL_LITTLE_ENDIAN, 0);
+	if (rc)
+		goto out;
+
+	rc = admin_command_execute(ocxlpmem, ADMIN_COMMAND_CONTROLLER_STATS);
+	if (rc < 0)
+		goto out;
+	if (rc != STATUS_SUCCESS) {
+		warn_status(ocxlpmem,
+			    "Unexpected status from controller stats", rc);
+		goto out;
+	}
+
+	rc = controller_stats_header_parse(ocxlpmem, &length);
+	if (rc)
+		goto out;
+
+	if (length != 0x140) // Documented length of controller stats response
+		warn_status(ocxlpmem,
+			    "Unexpected length for controller stats data, expected 0x140, got 0x%x",
+			    length);
+
+#define SPID1_OFFSET		(ocxlpmem->admin_command.data_offset + 0x08)
+#define SPID2_OFFSET		(ocxlpmem->admin_command.data_offset + 0x48)
+#define RESET_INFO		(SPID1_OFFSET + 0x08)
+#define UPTIME_LIFE		(SPID1_OFFSET + 0x10)
+#define CRITICAL_UTIL		(SPID2_OFFSET + 0x08)
+#define HOST_LOAD_COUNT		(SPID2_OFFSET + 0x10)
+#define HOST_STORE_COUNT	(SPID2_OFFSET + 0x18)
+#define HOST_LOAD_DURATION	(SPID2_OFFSET + 0x20)
+#define HOST_STORE_DURATION	(SPID2_OFFSET + 0x28)
+#define MEDIA_READ_COUNT	(SPID2_OFFSET + 0x50)
+#define MEDIA_WRITE_COUNT	(SPID2_OFFSET + 0x58)
+#define MEDIA_READ_DURATION	(SPID2_OFFSET + 0x60)
+#define MEDIA_WRITE_DURATION	(SPID2_OFFSET + 0x68)
+#define CACHE_READ_HIT_COUNT	(SPID2_OFFSET + 0x90)
+#define CACHE_WRITE_HIT_COUNT	(SPID2_OFFSET + 0x98)
+#define FAST_WRITE_COUNT	(SPID2_OFFSET + 0xA0)
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, SPID1_OFFSET,
+				     OCXL_LITTLE_ENDIAN, &val);
+	if (rc)
+		goto out;
+	if ((val >> 56) != 0x01) { // Check the parameter ID
+		rc = -ENODEV;
+		goto out;
+	}
+	if ((val & 0xFFFFFFFF) != 0x38) { // Check the length
+		rc = -ENODEV;
+		goto out;
+	}
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, RESET_INFO,
+				     OCXL_LITTLE_ENDIAN, &val);
+	if (rc)
+		goto out;
+
+	args.reset_count = val >> 32;
+	args.reset_uptime = val & 0xFFFFFFFF;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, UPTIME_LIFE,
+				     OCXL_LITTLE_ENDIAN, &val);
+	if (rc)
+		goto out;
+
+	args.power_on_uptime = val >> 32;
+	args.life_remaining = val & 0xFF;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, SPID2_OFFSET,
+				     OCXL_LITTLE_ENDIAN, &val);
+	if (rc)
+		goto out;
+	if ((val >> 56) != 0x02) { // Check the parameter ID
+		rc = -ENODEV;
+		goto out;
+	}
+	if ((val & 0xFFFFFFFF) != 0xF8) { // Check the length
+		rc = -ENODEV;
+		goto out;
+	}
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, CRITICAL_UTIL,
+				     OCXL_LITTLE_ENDIAN, &val);
+	if (rc)
+		goto out;
+
+	args.critical_resource_utilization = val & 0xff;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, HOST_LOAD_COUNT,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.host_load_count);
+	if (rc)
+		goto out;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, HOST_STORE_COUNT,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.host_store_count);
+	if (rc)
+		goto out;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, HOST_LOAD_DURATION,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.host_load_duration);
+	if (rc)
+		goto out;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, HOST_STORE_DURATION,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.host_store_duration);
+	if (rc)
+		goto out;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, MEDIA_READ_COUNT,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.media_read_count);
+	if (rc)
+		goto out;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, MEDIA_WRITE_COUNT,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.media_write_count);
+	if (rc)
+		goto out;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, MEDIA_READ_DURATION,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.media_read_duration);
+	if (rc)
+		goto out;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, MEDIA_WRITE_DURATION,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.media_write_duration);
+	if (rc)
+		goto out;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, CACHE_READ_HIT_COUNT,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.cache_read_hit_count);
+	if (rc)
+		goto out;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, CACHE_WRITE_HIT_COUNT,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.cache_write_hit_count);
+	if (rc)
+		goto out;
+
+	rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, FAST_WRITE_COUNT,
+				     OCXL_LITTLE_ENDIAN,
+				     &args.fast_write_count);
+	if (rc)
+		goto out;
+
+	if (copy_to_user(uarg, &args, sizeof(args))) {
+		rc = -EFAULT;
+		goto out;
+	}
+
+	rc = admin_response_handled(ocxlpmem);
+
+out:
+	mutex_unlock(&ocxlpmem->admin_command.lock);
+	return rc;
+}
+
 static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args)
 {
 	struct ocxlpmem *ocxlpmem = file->private_data;
@@ -736,6 +951,11 @@ static long file_ioctl(struct file *file, unsigned int cmd, unsigned long args)
 	case IOCTL_OCXLPMEM_CONTROLLER_DUMP_COMPLETE:
 		rc = ioctl_controller_dump_complete(ocxlpmem);
 		break;
+
+	case IOCTL_OCXLPMEM_CONTROLLER_STATS:
+		rc = ioctl_controller_stats(ocxlpmem,
+					    (struct ioctl_ocxlpmem_controller_stats __user *)args);
+		break;
 	}
 
 	return rc;
diff --git a/include/uapi/nvdimm/ocxlpmem.h b/include/uapi/nvdimm/ocxlpmem.h
index 05e2b3f7b27c..ca3a7098fa9d 100644
--- a/include/uapi/nvdimm/ocxlpmem.h
+++ b/include/uapi/nvdimm/ocxlpmem.h
@@ -51,6 +51,26 @@ struct ioctl_ocxlpmem_controller_dump_data {
 	__u64 reserved[8];
 };
 
+struct ioctl_ocxlpmem_controller_stats {
+	__u32 reset_count;
+	__u32 reset_uptime; /* seconds */
+	__u32 power_on_uptime; /* seconds */
+	__u8 life_remaining; /* percentage, 0-100 */
+	__u8 critical_resource_utilization; /* percentage, 0-100 */
+	__u8 reserved[2];
+	__u64 host_load_count;
+	__u64 host_store_count;
+	__u64 host_load_duration; /* nanoseconds, total */
+	__u64 host_store_duration; /* nanoseconds, total */
+	__u64 media_read_count;
+	__u64 media_write_count;
+	__u64 media_read_duration; /* nanoseconds, total */
+	__u64 media_write_duration; /* nanoseconds, total */
+	__u64 cache_read_hit_count;
+	__u64 cache_write_hit_count;
+	__u64 fast_write_count;
+};
+
 /* ioctl numbers */
 #define OCXLPMEM_MAGIC 0xCA
 /* OpenCAPI Persistent memory devices */
@@ -58,5 +78,6 @@ struct ioctl_ocxlpmem_controller_dump_data {
 #define IOCTL_OCXLPMEM_CONTROLLER_DUMP			_IO(OCXLPMEM_MAGIC, 0x31)
 #define IOCTL_OCXLPMEM_CONTROLLER_DUMP_DATA		_IOWR(OCXLPMEM_MAGIC, 0x32, struct ioctl_ocxlpmem_controller_dump_data)
 #define IOCTL_OCXLPMEM_CONTROLLER_DUMP_COMPLETE		_IO(OCXLPMEM_MAGIC, 0x33)
+#define IOCTL_OCXLPMEM_CONTROLLER_STATS			_IO(OCXLPMEM_MAGIC, 0x34)
 
 #endif /* _UAPI_OCXL_SCM_H */
-- 
2.24.1



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