[PATCH v8 04/14] powerpc/vas: Alloc and setup IRQ and trigger port address

[Haren Myneni]

On Mon, 2020-03-23 at 10:27 +0100, Cédric Le Goater wrote:
> On 3/23/20 10:06 AM, Cédric Le Goater wrote:
> > On 3/19/20 7:14 AM, Haren Myneni wrote:
> >>
> >> Alloc IRQ and get trigger port address for each VAS instance. Kernel
> >> register this IRQ per VAS instance and sets this port for each send
> >> window. NX interrupts the kernel when it sees page fault.
> > 
> > I don't understand why this is not done by the OPAL driver for each VAS 
> > of the system. Is the VAS unit very different from OpenCAPI regarding
> > the fault ? 
> 
> I checked the previous patchsets and I see that v3 was more like I expected
> it: one interrupt for faults allocated by the skiboot driver and exposed  
> in the DT.
> 
> What made you change your mind ? 
> 
> This version is hijacking the lowlevel routines of the XIVE irqchip which
> is not the best approach. OCXL is doing that because it needs to allocate
> interrupts for the user space processes using the AFU and we should rework 
> that part. 
> 
> However, the translation fault interrupt is allocated by skiboot.

Sorry my mistake. I should have CC you earlier. 

Each VAS instance will generate fault interrupt which is per chip. There
won't be other job completion interrupts. 

Correct, V3 used allocating interrupts per chip in skiboot and exposed
in DT. Since XIVE code has similar feature, exploited this approach so
that we do not need skiboot changes. 

Thanks
Haren


> 
> Sorry for the noise, I would like to understand more how this works. I also
> have passthrough in mind.
> 
> C.
>