[PATCH 1/2] powerpc test_emulate_step: fix DS operand in ld encoding to appropriate value

[Christophe Leroy]

Le 11/03/2020 à 07:14, Balamuruhan S a écrit :
> ld instruction should have 14 bit immediate field (DS) concatenated with
> 0b00 on the right, encode it accordingly.
> 
> Fixes: 4ceae137bdab ("powerpc: emulate_step() tests for load/store instructions")
> Reviewed-by: Sandipan Das <sandipan at linux.ibm.com>
> Signed-off-by: Balamuruhan S <bala24 at linux.ibm.com>
> ---
>   arch/powerpc/lib/test_emulate_step.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/lib/test_emulate_step.c b/arch/powerpc/lib/test_emulate_step.c
> index 42347067739c..51c254fd15b5 100644
> --- a/arch/powerpc/lib/test_emulate_step.c
> +++ b/arch/powerpc/lib/test_emulate_step.c
> @@ -19,7 +19,7 @@
>    * definitions.
>    */
>   #define TEST_LD(r, base, i)	(PPC_INST_LD | ___PPC_RT(r) |		\
> -					___PPC_RA(base) | IMM_L(i))
> +					___PPC_RA(base) | ((i) & 0xfffc))

I think you should squash patch 1 and 2 together. Or at least you should
put the new IMM_DS macro in patch 1 and use it instead of open coding.

>   #define TEST_LWZ(r, base, i)	(PPC_INST_LWZ | ___PPC_RT(r) |		\
>   					___PPC_RA(base) | IMM_L(i))
>   #define TEST_LWZX(t, a, b)	(PPC_INST_LWZX | ___PPC_RT(t) |		\
> 
> base-commit: 5aa19adac1f3152a5fd3b865a1ab46bb845d3696
> 

Christophe