[PATCH v6 4/8] libnvdimm/nvdimm/flush: Allow architecture to override the flush barrier
kernel test robot
lkp at intel.com
Tue Jun 30 04:53:37 AEST 2020
Hi "Aneesh,
I love your patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on linux-nvdimm/libnvdimm-for-next v5.8-rc3 next-20200629]
[cannot apply to scottwood/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Aneesh-Kumar-K-V/Support-new-pmem-flush-and-sync-instructions-for-POWER/20200629-223649
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: arc-allyesconfig (attached as .config)
compiler: arc-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>
All errors (new ones prefixed by >>):
drivers/nvdimm/region_devs.c: In function 'generic_nvdimm_flush':
>> drivers/nvdimm/region_devs.c:1215:2: error: implicit declaration of function 'arch_pmem_flush_barrier' [-Werror=implicit-function-declaration]
1215 | arch_pmem_flush_barrier();
| ^~~~~~~~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
vim +/arch_pmem_flush_barrier +1215 drivers/nvdimm/region_devs.c
1178
1179 int nvdimm_flush(struct nd_region *nd_region, struct bio *bio)
1180 {
1181 int rc = 0;
1182
1183 if (!nd_region->flush)
1184 rc = generic_nvdimm_flush(nd_region);
1185 else {
1186 if (nd_region->flush(nd_region, bio))
1187 rc = -EIO;
1188 }
1189
1190 return rc;
1191 }
1192 /**
1193 * nvdimm_flush - flush any posted write queues between the cpu and pmem media
1194 * @nd_region: blk or interleaved pmem region
1195 */
1196 int generic_nvdimm_flush(struct nd_region *nd_region)
1197 {
1198 struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
1199 int i, idx;
1200
1201 /*
1202 * Try to encourage some diversity in flush hint addresses
1203 * across cpus assuming a limited number of flush hints.
1204 */
1205 idx = this_cpu_read(flush_idx);
1206 idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
1207
1208 /*
1209 * The first arch_pmem_flush_barrier() is needed to 'sfence' all
1210 * previous writes such that they are architecturally visible for
1211 * the platform buffer flush. Note that we've already arranged for pmem
1212 * writes to avoid the cache via memcpy_flushcache(). The final
1213 * wmb() ensures ordering for the NVDIMM flush write.
1214 */
> 1215 arch_pmem_flush_barrier();
1216 for (i = 0; i < nd_region->ndr_mappings; i++)
1217 if (ndrd_get_flush_wpq(ndrd, i, 0))
1218 writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
1219 wmb();
1220
1221 return 0;
1222 }
1223 EXPORT_SYMBOL_GPL(nvdimm_flush);
1224
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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