[PATCH v4] ocxl: control via sysfs whether the FPGA is reloaded on a link reset

[Andrew Donnellan]

On 30/3/20 7:34 pm, Frederic Barrat wrote:
> From: Philippe Bergheaud <felix at linux.ibm.com>
> 
> Some opencapi FPGA images allow to control if the FPGA should be reloaded
> on the next adapter reset. If it is supported, the image specifies it
> through a Vendor Specific DVSEC in the config space of function 0.
> 
> Signed-off-by: Philippe Bergheaud <felix at linux.ibm.com>
> Signed-off-by: Frederic Barrat <fbarrat at linux.ibm.com>

Thanks for the cleanups.

My earlier concerns have been addressed thanks to an update to the 
relevant specification - a Vendor Specific DVSEC with an IBM vendor ID 
and IBM-specific DVSEC ID is specific to the IBM CFG subsystem 
implementation, alternative implementations will need to use a different 
vendor IDs and DVSEC IDs.

> ---
> 
> Changelog:
> v2:
>    - refine ResetReload debug message
>    - do not call get_function_0() if pci_dev is for function 0
> v3:
>    - avoid get_function_0() in ocxl_config_set_reset_reload also
> v4:
>    - simplify parsing of Vendor Specific DVSEC during AFU init
>    - only set/unset bit 0 of the config space register
>    - commonize code to fetch the right PCI function and DVSEC offset
>    - use kstrtoint() when parsing the sysfs buffer
> 
> 
>   Documentation/ABI/testing/sysfs-class-ocxl | 10 +++
>   drivers/misc/ocxl/config.c                 | 81 ++++++++++++++++++++--
>   drivers/misc/ocxl/ocxl_internal.h          |  6 ++
>   drivers/misc/ocxl/sysfs.c                  | 35 ++++++++++
>   include/misc/ocxl-config.h                 |  1 +
>   5 files changed, 128 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/ABI/testing/sysfs-class-ocxl b/Documentation/ABI/testing/sysfs-class-ocxl
> index b5b1fa197592..b9ea671d5805 100644
> --- a/Documentation/ABI/testing/sysfs-class-ocxl
> +++ b/Documentation/ABI/testing/sysfs-class-ocxl
> @@ -33,3 +33,13 @@ Date:		January 2018
>   Contact:	linuxppc-dev at lists.ozlabs.org
>   Description:	read/write
>   		Give access the global mmio area for the AFU
> +
> +What:		/sys/class/ocxl/<afu name>/reload_on_reset
> +Date:		February 2020
> +Contact:	linuxppc-dev at lists.ozlabs.org
> +Description:	read/write
> +		Control whether the FPGA is reloaded on a link reset
> +			0	Do not reload FPGA image from flash
> +			1	Reload FPGA image from flash
> +			unavailable
> +				The device does not support this capability

We should perhaps document here that this is specific to the IBM CFG 
implementation and the IBM-specific DVSEC?

-- 
Andrew Donnellan              OzLabs, ADL Canberra
ajd at linux.ibm.com             IBM Australia Limited