[PATCH 2/2] powerpc/64s: system call support for scv/rfscv instructions

Michael Ellerman mpe at ellerman.id.au
Fri Jul 24 20:45:36 AEST 2020


Christophe Leroy <christophe.leroy at csgroup.eu> writes:
> Michael Ellerman <mpe at ellerman.id.au> a écrit :
>
>> Nicholas Piggin <npiggin at gmail.com> writes:
>>> diff --git a/arch/powerpc/include/asm/ppc-opcode.h  
>>> b/arch/powerpc/include/asm/ppc-opcode.h
>>> index 2a39c716c343..b2bdc4de1292 100644
>>> --- a/arch/powerpc/include/asm/ppc-opcode.h
>>> +++ b/arch/powerpc/include/asm/ppc-opcode.h
>>> @@ -257,6 +257,7 @@
>>>  #define PPC_INST_MFVSRD			0x7c000066
>>>  #define PPC_INST_MTVSRD			0x7c000166
>>>  #define PPC_INST_SC			0x44000002
>>> +#define PPC_INST_SCV			0x44000001
>> ...
>>> @@ -411,6 +412,7 @@
>> ...
>>> +#define __PPC_LEV(l)	(((l) & 0x7f) << 5)
>>
>> These conflicted and didn't seem to be used so I dropped them.
>>
>>> diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
>>> index 5abe98216dc2..161bfccbc309 100644
>>> --- a/arch/powerpc/lib/sstep.c
>>> +++ b/arch/powerpc/lib/sstep.c
>>> @@ -3378,6 +3382,16 @@ int emulate_step(struct pt_regs *regs,  
>>> struct ppc_inst instr)
>>>  		regs->msr = MSR_KERNEL;
>>>  		return 1;
>>>
>>> +	case SYSCALL_VECTORED_0:	/* scv 0 */
>>> +		regs->gpr[9] = regs->gpr[13];
>>> +		regs->gpr[10] = MSR_KERNEL;
>>> +		regs->gpr[11] = regs->nip + 4;
>>> +		regs->gpr[12] = regs->msr & MSR_MASK;
>>> +		regs->gpr[13] = (unsigned long) get_paca();
>>> +		regs->nip = (unsigned long) &system_call_vectored_emulate;
>>> +		regs->msr = MSR_KERNEL;
>>> +		return 1;
>>> +
>>
>> This broke the ppc64e build:
>>
>>   ld: arch/powerpc/lib/sstep.o:(.toc+0x0): undefined reference to  
>> `system_call_vectored_emulate'
>>   make[1]: *** [/home/michael/linux/Makefile:1139: vmlinux] Error 1
>>
>> I wrapped it in #ifdef CONFIG_PPC64_BOOK3S.
>
> You mean CONFIG_PPC_BOOK3S_64 ?

I hope so ...

#### ## ####.

Will send a fixup. Thanks for noticing.

cheers


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