[PATCH v5] ocxl: control via sysfs whether the FPGA is reloaded on a link reset

[Andrew Donnellan]

On 20/6/20 12:04 am, Frederic Barrat wrote:
> From: Philippe Bergheaud <felix at linux.ibm.com>
> 
> Some opencapi FPGA images allow to control if the FPGA should be reloaded
> on the next adapter reset. If it is supported, the image specifies it
> through a Vendor Specific DVSEC in the config space of function 0.
> 
> Signed-off-by: Philippe Bergheaud <felix at linux.ibm.com>
> Signed-off-by: Frederic Barrat <fbarrat at linux.ibm.com>
Reviewed-by: Andrew Donnellan <ajd at linux.ibm.com>

-- 
Andrew Donnellan              OzLabs, ADL Canberra
ajd at linux.ibm.com             IBM Australia Limited