[PATCH v2 04/13] powerpc sstep: Add support for prefixed load/stores

Jordan Niethe jniethe5 at gmail.com
Wed Feb 12 13:59:59 AEDT 2020


On Tue, Feb 11, 2020 at 5:05 PM Christophe Leroy
<christophe.leroy at c-s.fr> wrote:
>
>
>
> Le 11/02/2020 à 06:33, Jordan Niethe a écrit :
> > This adds emulation support for the following prefixed integer
> > load/stores:
> >    * Prefixed Load Byte and Zero (plbz)
> >    * Prefixed Load Halfword and Zero (plhz)
> >    * Prefixed Load Halfword Algebraic (plha)
> >    * Prefixed Load Word and Zero (plwz)
> >    * Prefixed Load Word Algebraic (plwa)
> >    * Prefixed Load Doubleword (pld)
> >    * Prefixed Store Byte (pstb)
> >    * Prefixed Store Halfword (psth)
> >    * Prefixed Store Word (pstw)
> >    * Prefixed Store Doubleword (pstd)
> >    * Prefixed Load Quadword (plq)
> >    * Prefixed Store Quadword (pstq)
> >
> > the follow prefixed floating-point load/stores:
> >    * Prefixed Load Floating-Point Single (plfs)
> >    * Prefixed Load Floating-Point Double (plfd)
> >    * Prefixed Store Floating-Point Single (pstfs)
> >    * Prefixed Store Floating-Point Double (pstfd)
> >
> > and for the following prefixed VSX load/stores:
> >    * Prefixed Load VSX Scalar Doubleword (plxsd)
> >    * Prefixed Load VSX Scalar Single-Precision (plxssp)
> >    * Prefixed Load VSX Vector [0|1]  (plxv, plxv0, plxv1)
> >    * Prefixed Store VSX Scalar Doubleword (pstxsd)
> >    * Prefixed Store VSX Scalar Single-Precision (pstxssp)
> >    * Prefixed Store VSX Vector [0|1] (pstxv, pstxv0, pstxv1)
> >
> > Signed-off-by: Jordan Niethe <jniethe5 at gmail.com>
> > ---
> > v2: - Combine all load/store patches
> >      - Fix the name of Type 01 instructions
> >      - Remove sign extension flag from pstd/pld
> >      - Rename sufx -> suffix
> > ---
> >   arch/powerpc/lib/sstep.c | 165 +++++++++++++++++++++++++++++++++++++++
> >   1 file changed, 165 insertions(+)
> >
> > diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
> > index 65143ab1bf64..0e21c21ff2be 100644
> > --- a/arch/powerpc/lib/sstep.c
> > +++ b/arch/powerpc/lib/sstep.c
> > @@ -187,6 +187,44 @@ static nokprobe_inline unsigned long xform_ea(unsigned int instr,
> >       return ea;
> >   }
> >
> > +/*
> > + * Calculate effective address for a MLS:D-form / 8LS:D-form
> > + * prefixed instruction
> > + */
> > +static nokprobe_inline unsigned long mlsd_8lsd_ea(unsigned int instr,
> > +                                               unsigned int suffix,
> > +                                               const struct pt_regs *regs)
> > +{
> > +     int ra, prefix_r;
> > +     unsigned int  dd;
> > +     unsigned long ea, d0, d1, d;
> > +
> > +     prefix_r = instr & (1ul << 20);
> > +     ra = (suffix >> 16) & 0x1f;
> > +
> > +     d0 = instr & 0x3ffff;
> > +     d1 = suffix & 0xffff;
> > +     d = (d0 << 16) | d1;
> > +
> > +     /*
> > +      * sign extend a 34 bit number
> > +      */
> > +     dd = (unsigned int) (d >> 2);
> > +     ea = (signed int) dd;
> > +     ea = (ea << 2) | (d & 0x3);
> > +
> > +     if (!prefix_r && ra)
> > +             ea += regs->gpr[ra];
> > +     else if (!prefix_r && !ra)
> > +             ; /* Leave ea as is */
> > +     else if (prefix_r && !ra)
> > +             ea += regs->nip;
> > +     else if (prefix_r && ra)
> > +             ; /* Invalid form. Should already be checked for by caller! */
> > +
> > +     return ea;
> > +}
> > +
> >   /*
> >    * Return the largest power of 2, not greater than sizeof(unsigned long),
> >    * such that x is a multiple of it.
> > @@ -1166,6 +1204,7 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
> >                 unsigned int instr, unsigned int suffix)
> >   {
> >       unsigned int opcode, ra, rb, rc, rd, spr, u;
> > +     unsigned int suffixopcode, prefixtype, prefix_r;
> >       unsigned long int imm;
> >       unsigned long int val, val2;
> >       unsigned int mb, me, sh;
> > @@ -2652,6 +2691,132 @@ int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
> >
> >       }
> >
> > +/*
> > + * Prefixed instructions
> > + */
> > +     switch (opcode) {
> > +     case 1:
>
> Why not include it in the above switch () ?
I was wanting to keep all the prefixed instructions together, but you
are right, these are all load/stores so it would be clearer for them
to go in the Load and Stores switch.
>
> Should it be enclosed by #ifdef __powerpc64__, or will this new ISA also
> apply to 32 bits processors ?
No at this time it will not affect 32bit processors. I will #ifdef it.
>
> > +             prefix_r = instr & (1ul << 20);
> > +             ra = (suffix >> 16) & 0x1f;
> > +             op->update_reg = ra;
> > +             rd = (suffix >> 21) & 0x1f;
> > +             op->reg = rd;
> > +             op->val = regs->gpr[rd];
> > +
> > +             suffixopcode = suffix >> 26;
> > +             prefixtype = (instr >> 24) & 0x3;
> > +             switch (prefixtype) {
> > +             case 0: /* Type 00  Eight-Byte Load/Store */
> > +                     if (prefix_r && ra)
> > +                             break;
> > +                     op->ea = mlsd_8lsd_ea(instr, suffix, regs);
> > +                     switch (suffixopcode) {
> > +                     case 41:        /* plwa */
> > +                             op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 4);
> > +                             break;
> > +                     case 42:        /* plxsd */
> > +                             op->reg = rd + 32;
> > +                             op->type = MKOP(LOAD_VSX, PREFIXED, 8);
> > +                             op->element_size = 8;
> > +                             op->vsx_flags = VSX_CHECK_VEC;
> > +                             break;
> > +                     case 43:        /* plxssp */
> > +                             op->reg = rd + 32;
> > +                             op->type = MKOP(LOAD_VSX, PREFIXED, 4);
> > +                             op->element_size = 8;
> > +                             op->vsx_flags = VSX_FPCONV | VSX_CHECK_VEC;
> > +                             break;
> > +                     case 46:        /* pstxsd */
> > +                             op->reg = rd + 32;
> > +                             op->type = MKOP(STORE_VSX, PREFIXED, 8);
> > +                             op->element_size = 8;
> > +                             op->vsx_flags = VSX_CHECK_VEC;
> > +                             break;
> > +                     case 47:        /* pstxssp */
> > +                             op->reg = rd + 32;
> > +                             op->type = MKOP(STORE_VSX, PREFIXED, 4);
> > +                             op->element_size = 8;
> > +                             op->vsx_flags = VSX_FPCONV | VSX_CHECK_VEC;
> > +                             break;
> > +                     case 51:        /* plxv1 */
> > +                             op->reg += 32;
> > +
> > +                             /* fallthru */
> > +                     case 50:        /* plxv0 */
> > +                             op->type = MKOP(LOAD_VSX, PREFIXED, 16);
> > +                             op->element_size = 16;
> > +                             op->vsx_flags = VSX_CHECK_VEC;
> > +                             break;
> > +                     case 55:        /* pstxv1 */
> > +                             op->reg = rd + 32;
> > +
> > +                             /* fallthru */
> > +                     case 54:        /* pstxv0 */
> > +                             op->type = MKOP(STORE_VSX, PREFIXED, 16);
> > +                             op->element_size = 16;
> > +                             op->vsx_flags = VSX_CHECK_VEC;
> > +                             break;
> > +                     case 56:        /* plq */
> > +                             op->type = MKOP(LOAD, PREFIXED, 16);
> > +                             break;
> > +                     case 57:        /* pld */
> > +                             op->type = MKOP(LOAD, PREFIXED, 8);
> > +                             break;
> > +                     case 60:        /* stq */
> > +                             op->type = MKOP(STORE, PREFIXED, 16);
> > +                             break;
> > +                     case 61:        /* pstd */
> > +                             op->type = MKOP(STORE, PREFIXED, 8);
> > +                             break;
> > +                     }
> > +                     break;
> > +             case 1: /* Type 01 Eight-Byte Register-to-Register */
> > +                     break;
> > +             case 2: /* Type 10 Modified Load/Store */
> > +                     if (prefix_r && ra)
> > +                             break;
> > +                     op->ea = mlsd_8lsd_ea(instr, suffix, regs);
> > +                     switch (suffixopcode) {
> > +                     case 32:        /* plwz */
> > +                             op->type = MKOP(LOAD, PREFIXED, 4);
> > +                             break;
> > +                     case 34:        /* plbz */
> > +                             op->type = MKOP(LOAD, PREFIXED, 1);
> > +                             break;
> > +                     case 36:        /* pstw */
> > +                             op->type = MKOP(STORE, PREFIXED, 4);
> > +                             break;
> > +                     case 38:        /* pstb */
> > +                             op->type = MKOP(STORE, PREFIXED, 1);
> > +                             break;
> > +                     case 40:        /* plhz */
> > +                             op->type = MKOP(LOAD, PREFIXED, 2);
> > +                             break;
> > +                     case 42:        /* plha */
> > +                             op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 2);
> > +                             break;
> > +                     case 44:        /* psth */
> > +                             op->type = MKOP(STORE, PREFIXED, 2);
> > +                             break;
> > +                     case 48:        /* plfs */
> > +                             op->type = MKOP(LOAD_FP, PREFIXED | FPCONV, 4);
> > +                             break;
> > +                     case 50:        /* plfd */
> > +                             op->type = MKOP(LOAD_FP, PREFIXED, 8);
> > +                             break;
> > +                     case 52:        /* pstfs */
> > +                             op->type = MKOP(STORE_FP, PREFIXED | FPCONV, 4);
> > +                             break;
> > +                     case 54:        /* pstfd */
> > +                             op->type = MKOP(STORE_FP, PREFIXED, 8);
> > +                             break;
> > +                     }
> > +                     break;
> > +             case 3: /* Type 11 Modified Register-to-Register */
> > +                     break;
> > +             }
> > +     }
> > +
> >   #ifdef CONFIG_VSX
> >       if ((GETTYPE(op->type) == LOAD_VSX ||
> >            GETTYPE(op->type) == STORE_VSX) &&
> >
>
> Christophe


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