[PATCH v5 05/21] powerpc: Use a function for getting the instruction op code

[Christophe Leroy]

Le 06/04/2020 à 10:09, Jordan Niethe a écrit :
> In preparation for using a data type for instructions that can not be
> directly used with the '>>' operator use a function for getting the op
> code of an instruction.
> 
> Signed-off-by: Jordan Niethe <jniethe5 at gmail.com>
> ---
> v4: New to series
> ---
>   arch/powerpc/include/asm/inst.h  | 5 +++++
>   arch/powerpc/kernel/align.c      | 2 +-
>   arch/powerpc/lib/code-patching.c | 4 ++--

What about store_updates_sp() in mm/fault.c ?

Christophe

>   3 files changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h
> index 5298ba33b6e5..93959016fe4b 100644
> --- a/arch/powerpc/include/asm/inst.h
> +++ b/arch/powerpc/include/asm/inst.h
> @@ -8,4 +8,9 @@
>   
>   #define ppc_inst(x) (x)
>   
> +static inline int ppc_inst_opcode(u32 x)
> +{
> +	return x >> 26;
> +}
> +
>   #endif /* _ASM_INST_H */
> diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
> index 86e9bf62f18c..691013aa9f3c 100644
> --- a/arch/powerpc/kernel/align.c
> +++ b/arch/powerpc/kernel/align.c
> @@ -314,7 +314,7 @@ int fix_alignment(struct pt_regs *regs)
>   	}
>   
>   #ifdef CONFIG_SPE
> -	if ((instr >> 26) == 0x4) {
> +	if (ppc_inst_opcode(instr) == 0x4) {
>   		int reg = (instr >> 21) & 0x1f;
>   		PPC_WARN_ALIGNMENT(spe, regs);
>   		return emulate_spe(regs, reg, instr);
> diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
> index fdf0d6ea3575..099a515202aa 100644
> --- a/arch/powerpc/lib/code-patching.c
> +++ b/arch/powerpc/lib/code-patching.c
> @@ -231,7 +231,7 @@ bool is_offset_in_branch_range(long offset)
>    */
>   bool is_conditional_branch(unsigned int instr)
>   {
> -	unsigned int opcode = instr >> 26;
> +	unsigned int opcode = ppc_inst_opcode(instr);
>   
>   	if (opcode == 16)       /* bc, bca, bcl, bcla */
>   		return true;
> @@ -289,7 +289,7 @@ int create_cond_branch(unsigned int *instr, const unsigned int *addr,
>   
>   static unsigned int branch_opcode(unsigned int instr)
>   {
> -	return (instr >> 26) & 0x3F;
> +	return ppc_inst_opcode(instr) & 0x3F;
>   }
>   
>   static int instr_is_branch_iform(unsigned int instr)
>