powerpc/mm: Only define MAX_PHYSMEM_BITS in SPARSEMEM configurations
Ben Hutchings
ben at decadent.org.uk
Mon Mar 25 10:05:14 AEDT 2019
On Sun, 2019-03-24 at 23:18 +0100, Andreas Schwab wrote:
> On Mär 22 2019, Michael Ellerman <patch-notifications at ellerman.id.au> wrote:
>
> > On Sun, 2019-03-17 at 01:17:56 UTC, Ben Hutchings wrote:
> > > MAX_PHYSMEM_BITS only needs to be defined if CONFIG_SPARSEMEM is
> > > enabled, and that was the case before commit 4ffe713b7587
> > > ("powerpc/mm: Increase the max addressable memory to 2PB").
> > >
> > > On 32-bit systems, where CONFIG_SPARSEMEM is not enabled, we now
> > > define it as 46. That is larger than the real number of physical
> > > address bits, and breaks calculations in zsmalloc:
> > >
> > > mm/zsmalloc.c:130:49: warning: right shift count is negative [-Wshift-count-negative]
> > > MAX(32, (ZS_MAX_PAGES_PER_ZSPAGE << PAGE_SHIFT >> OBJ_INDEX_BITS))
> > > ^~
> > > ...
> > > mm/zsmalloc.c:253:21: error: variably modified 'size_class' at file scope
> > > struct size_class *size_class[ZS_SIZE_CLASSES];
> > > ^~~~~~~~~~
> > >
> > > Fixes: 4ffe713b7587 ("powerpc/mm: Increase the max addressable memory to 2PB")
> > > Cc: stable at vger.kernel.org
> > > Signed-off-by: Ben Hutchings <ben at decadent.org.uk>
> >
> > Applied to powerpc fixes, thanks.
> >
> > https://git.kernel.org/powerpc/c/8bc086899816214fbc6047c9c7e15fca
>
> In file included from ./arch/powerpc/include/asm/book3s/64/mmu.h:39:0,
> from ./arch/powerpc/include/asm/mmu.h:360,
> from ./arch/powerpc/include/asm/lppaca.h:36,
> from ./arch/powerpc/include/asm/paca.h:21,
> from ./arch/powerpc/include/asm/current.h:16,
> from ./include/linux/thread_info.h:21,
> from ./include/asm-generic/preempt.h:5,
> from ./arch/powerpc/include/generated/asm/preempt.h:1,
> from ./include/linux/preempt.h:78,
> from ./include/linux/spinlock.h:51,
> from ./include/linux/mmzone.h:8,
> from ./include/linux/gfp.h:6,
> from ./include/linux/slab.h:15,
> from ./include/linux/crypto.h:24,
> from ./include/crypto/algapi.h:15,
> from ./include/crypto/internal/hash.h:16,
> from arch/powerpc/crypto/md5-glue.c:15:
> ./arch/powerpc/include/asm/book3s/64/mmu-hash.h:584:6: error: "MAX_PHYSMEM_BITS" is not defined [-Werror=undef]
> #if (MAX_PHYSMEM_BITS > MAX_EA_BITS_PER_CONTEXT)
> ^
Presumably you have CONFIG_PPC_BOOK3S_64 enabled and CONFIG_SPARSEMEM
disabled? Was this configuration actually usable?
I think this would fix the build failure:
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -341,7 +341,7 @@ static inline u16 get_mm_addr_key(struct mm_struct
*mm, unsigned long address)
#if defined(CONFIG_SPARSEMEM_VMEMMAP) &&
defined(CONFIG_SPARSEMEM_EXTREME) && \
defined (CONFIG_PPC_64K_PAGES)
#define MAX_PHYSMEM_BITS 51
-#elif defined(CONFIG_SPARSEMEM)
+#elif defined(CONFIG_PPC64)
#define MAX_PHYSMEM_BITS 46
#endif
--- END ---
but whether the result will actually *work*, I don't know.
Ben.
--
Ben Hutchings
Larkinson's Law: All laws are basically false.
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