[PATCH v3 0/6] soc/fsl/qe: cleanups and new DT binding

Leo Li leoyang.li at nxp.com
Tue Jun 4 05:55:51 AEST 2019



> -----Original Message-----
> From: Rasmus Villemoes <Rasmus.Villemoes at prevas.se>
> Sent: Monday, June 3, 2019 2:54 PM
> To: devicetree at vger.kernel.org; Qiang Zhao <qiang.zhao at nxp.com>; Leo Li
> <leoyang.li at nxp.com>
> Cc: linuxppc-dev at lists.ozlabs.org; linux-arm-kernel at lists.infradead.org;
> linux-kernel at vger.kernel.org; Rob Herring <robh+dt at kernel.org>; Scott
> Wood <oss at buserror.net>; Christophe Leroy <christophe.leroy at c-s.fr>;
> Mark Rutland <mark.rutland at arm.com>; jocke at infinera.com
> <joakim.tjernlund at infinera.com>
> Subject: Re: [PATCH v3 0/6] soc/fsl/qe: cleanups and new DT binding
> 
> On 13/05/2019 13.14, Rasmus Villemoes wrote:
> > This small series consists of some small cleanups and simplifications
> > of the QUICC engine driver, and introduces a new DT binding that makes
> > it much easier to support other variants of the QUICC engine IP block
> > that appears in the wild: There's no reason to expect in general that
> > the number of valid SNUMs uniquely determines the set of such, so it's
> > better to simply let the device tree specify the values (and,
> > implicitly via the array length, also the count).
> >
> > Which tree should this go through?
> 
> Ping? These patches should be ready to go in, but I don't know who is
> supposed to pick them up.

I can pick them up through the soc/fsl tree.

Regards,
Leo


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