[PATCH] KVM: PPC: Book3S HV: Fix CR0 setting in TM emulation

Michael Ellerman patch-notifications at ellerman.id.au
Mon Jul 8 11:19:42 AEST 2019

On Thu, 2019-06-20 at 06:00:40 UTC, Michael Neuling wrote:
> When emulating tsr, treclaim and trechkpt, we incorrectly set CR0. The
> code currently sets:
>     CR0 <- 00 || MSR[TS]
> but according to the ISA it should be:
>     CR0 <-  0 || MSR[TS] || 0
> This fixes the bit shift to put the bits in the correct location.
> Tested-by: Suraj Jitindar Singh <sjitindarsingh at gmail.com>
> Signed-off-by: Michael Neuling <mikey at neuling.org>

Applied to powerpc next, thanks.



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