[PATCH v5 01/10] powerpc: unify definition of M_IF_NEEDED
Jason Yan
yanaijie at huawei.com
Thu Aug 8 13:25:51 AEST 2019
On 2019/8/7 21:13, Michael Ellerman wrote:
> Jason Yan <yanaijie at huawei.com> writes:
>> M_IF_NEEDED is defined too many times. Move it to a common place.
>
> The name is not great, can you call it MAS2_M_IF_NEEDED, which at least
> gives a clue what it's for?
>
OK.
> cheers
>
>> Signed-off-by: Jason Yan <yanaijie at huawei.com>
>> Cc: Diana Craciun <diana.craciun at nxp.com>
>> Cc: Michael Ellerman <mpe at ellerman.id.au>
>> Cc: Christophe Leroy <christophe.leroy at c-s.fr>
>> Cc: Benjamin Herrenschmidt <benh at kernel.crashing.org>
>> Cc: Paul Mackerras <paulus at samba.org>
>> Cc: Nicholas Piggin <npiggin at gmail.com>
>> Cc: Kees Cook <keescook at chromium.org>
>> Reviewed-by: Christophe Leroy <christophe.leroy at c-s.fr>
>> Reviewed-by: Diana Craciun <diana.craciun at nxp.com>
>> Tested-by: Diana Craciun <diana.craciun at nxp.com>
>> ---
>> arch/powerpc/include/asm/nohash/mmu-book3e.h | 10 ++++++++++
>> arch/powerpc/kernel/exceptions-64e.S | 10 ----------
>> arch/powerpc/kernel/fsl_booke_entry_mapping.S | 10 ----------
>> arch/powerpc/kernel/misc_64.S | 5 -----
>> 4 files changed, 10 insertions(+), 25 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/nohash/mmu-book3e.h b/arch/powerpc/include/asm/nohash/mmu-book3e.h
>> index 4c9777d256fb..0877362e48fa 100644
>> --- a/arch/powerpc/include/asm/nohash/mmu-book3e.h
>> +++ b/arch/powerpc/include/asm/nohash/mmu-book3e.h
>> @@ -221,6 +221,16 @@
>> #define TLBILX_T_CLASS2 6
>> #define TLBILX_T_CLASS3 7
>>
>> +/*
>> + * The mapping only needs to be cache-coherent on SMP, except on
>> + * Freescale e500mc derivatives where it's also needed for coherent DMA.
>> + */
>> +#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
>> +#define M_IF_NEEDED MAS2_M
>> +#else
>> +#define M_IF_NEEDED 0
>> +#endif
>> +
>> #ifndef __ASSEMBLY__
>> #include <asm/bug.h>
>>
>> diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
>> index 1cfb3da4a84a..fd49ec07ce4a 100644
>> --- a/arch/powerpc/kernel/exceptions-64e.S
>> +++ b/arch/powerpc/kernel/exceptions-64e.S
>> @@ -1342,16 +1342,6 @@ skpinv: addi r6,r6,1 /* Increment */
>> sync
>> isync
>>
>> -/*
>> - * The mapping only needs to be cache-coherent on SMP, except on
>> - * Freescale e500mc derivatives where it's also needed for coherent DMA.
>> - */
>> -#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
>> -#define M_IF_NEEDED MAS2_M
>> -#else
>> -#define M_IF_NEEDED 0
>> -#endif
>> -
>> /* 6. Setup KERNELBASE mapping in TLB[0]
>> *
>> * r3 = MAS0 w/TLBSEL & ESEL for the entry we started in
>> diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
>> index ea065282b303..de0980945510 100644
>> --- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
>> +++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
>> @@ -153,16 +153,6 @@ skpinv: addi r6,r6,1 /* Increment */
>> tlbivax 0,r9
>> TLBSYNC
>>
>> -/*
>> - * The mapping only needs to be cache-coherent on SMP, except on
>> - * Freescale e500mc derivatives where it's also needed for coherent DMA.
>> - */
>> -#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
>> -#define M_IF_NEEDED MAS2_M
>> -#else
>> -#define M_IF_NEEDED 0
>> -#endif
>> -
>> #if defined(ENTRY_MAPPING_BOOT_SETUP)
>>
>> /* 6. Setup KERNELBASE mapping in TLB1[0] */
>> diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
>> index b55a7b4cb543..26074f92d4bc 100644
>> --- a/arch/powerpc/kernel/misc_64.S
>> +++ b/arch/powerpc/kernel/misc_64.S
>> @@ -432,11 +432,6 @@ kexec_create_tlb:
>> rlwimi r9,r10,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r9) */
>>
>> /* Set up a temp identity mapping v:0 to p:0 and return to it. */
>> -#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
>> -#define M_IF_NEEDED MAS2_M
>> -#else
>> -#define M_IF_NEEDED 0
>> -#endif
>> mtspr SPRN_MAS0,r9
>>
>> lis r9,(MAS1_VALID|MAS1_IPROT)@h
>> --
>> 2.17.2
>
> .
>
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