[PATCH RFT V2 1/8] clk: divider: add explicit big endian support

[Stephen Boyd]

Quoting Jonas Gorski (2019-04-15 03:10:39)
> @@ -370,7 +388,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
>         if (divider->flags & CLK_DIVIDER_READ_ONLY) {
>                 u32 val;
>  
> -               val = clk_readl(divider->reg) >> divider->shift;
> +               val = clk_div_readl(divider->reg) >> divider->shift;

Good deal that kbuild running sparse found that this was supposed to be
divider and not divider->reg. If you can fix that and remove the else in
all the basic type readl wrappers then this series looks good to merge
for me.