KVM: PPC: Book3S HV: Fix guest r11 corruption with POWER9 TM workarounds

[sathnaga]

On 2018-09-14 22:26, sathnaga at linux.vnet.ibm.com wrote:
> Date: Thu, 13 Sep 2018 15:33:47 +1000
> From: Michael Neuling <mikey at neuling.org>
> To: mpe at ellerman.id.au
> Cc: linuxppc-dev at lists.ozlabs.org, kvm-ppc at vger.kernel.org,
> paulus at ozlabs.org, sjitindarsingh at gmail.com, mikey at neuling.org
> Subject: KVM: PPC: Book3S HV: Fix guest r11 corruption with POWER9 TM
> workarounds
> 
> When we come into the softpatch handler (0x1500), we use r11 to store
> the HSRR0 for later use by the denorm handler.
> 
> We also use the softpatch handler for the TM workarounds for
> POWER9. Unfortunately, in kvmppc_interrupt_hv we later store r11 out
> to the vcpu assuming it's still what we got from userspace.
> 
> This causes r11 to be corrupted in the VCPU and hence when we restore
> the guest, we get a corrupted r11. We've seen this when running TM
> tests inside guests on P9.
> 
> This fixes the problem by only touching r11 in the denorm case.
> 
> Fixes: 4bb3c7a020 ("KVM: PPC: Book3S HV: Work around transactional
> memory bugs in POWER9")
> Cc: <stable at vger.kernel.org> # 4.17+
> Test-by: Suraj Jitindar Singh <sjitindarsingh at gmail.com>
> Reviewed-by: Paul Mackerras <paulus at ozlabs.org>
> Signed-off-by: Michael Neuling <mikey at neuling.org>
> ---
>  arch/powerpc/kernel/exceptions-64s.S | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
Tested-by: Satheesh Rajendran <sathnaga at linux.vnet.ibm.com>

Test details: 
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1792501

Regards,
-Satheesh.

> diff --git a/arch/powerpc/kernel/exceptions-64s.S
> b/arch/powerpc/kernel/exceptions-64s.S
> index ea04dfb8c0..2d8fc8c9da 100644
> --- a/arch/powerpc/kernel/exceptions-64s.S
> +++ b/arch/powerpc/kernel/exceptions-64s.S
> @@ -1314,9 +1314,7 @@ EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 
> 0x100)
> 
>  #ifdef CONFIG_PPC_DENORMALISATION
>  	mfspr	r10,SPRN_HSRR1
> -	mfspr	r11,SPRN_HSRR0		/* save HSRR0 */
>  	andis.	r10,r10,(HSRR1_DENORM)@h /* denorm? */
> -	addi	r11,r11,-4		/* HSRR0 is next instruction */
>  	bne+	denorm_assist
>  #endif
> 
> @@ -1382,6 +1380,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
>   */
>  	XVCPSGNDP32(32)
>  denorm_done:
> +	mfspr	r11,SPRN_HSRR0
> +	subi	r11,r11,4
>  	mtspr	SPRN_HSRR0,r11
>  	mtcrf	0x80,r9
>  	ld	r9,PACA_EXGEN+EX_R9(r13)
>