[v6, 1/2] raid6/altivec: Add vpermxor implementation for raid6 Q syndrome

Michael Ellerman patch-notifications at ellerman.id.au
Tue Mar 20 09:22:46 AEDT 2018

On Fri, 2017-08-04 at 03:42:32 UTC, Matt Brown wrote:
> This patch uses the vpermxor instruction to optimise the raid6 Q syndrome.
> This instruction was made available with POWER8, ISA version 2.07.
> It allows for both vperm and vxor instructions to be done in a single
> instruction. This has been tested for correctness on a ppc64le vm with a
> basic RAID6 setup containing 5 drives.
> The performance benchmarks are from the raid6test in the /lib/raid6/test
> directory. These results are from an IBM Firestone machine with ppc64le
> architecture. The benchmark results show a 35% speed increase over the best
> existing algorithm for powerpc (altivec). The raid6test has also been run
> on a big-endian ppc64 vm to ensure it also works for big-endian
> architectures.
> Performance benchmarks:
> 		raid6: altivecx4 gen() 18773 MB/s
> 		raid6: altivecx8 gen() 19438 MB/s
> 		raid6: vpermxor4 gen() 25112 MB/s
> 		raid6: vpermxor8 gen() 26279 MB/s
> Signed-off-by: Matt Brown <matthew.brown.dev at gmail.com>
> Reviewed-by: Daniel Axtens <dja at axtens.net>

Series applied to powerpc next, thanks.



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