Are those hacks still valid on powerpc kernel ?
Benjamin Herrenschmidt
benh at kernel.crashing.org
Thu Jan 25 10:49:42 AEDT 2018
On Wed, 2018-01-24 at 11:17 +0100, Christophe LEROY wrote:
> Below comments are very old.
>
> Aren't new glibc and binutils now able to go without this ?
>
> Note that the code inside the #if 0 is wrong as we have no vma defined
> in the function.
>
> Or does it just have no performance impact anyway ?
>
>
> From /arch/powerpc/mm/mem.c:
>
> void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
> {
> clear_page(page);
>
> /*
> * We shouldn't have to do this, but some versions of glibc
> * require it (ld.so assumes zero filled pages are icache clean)
> * - Anton
> */
> flush_dcache_page(pg);
> }
> EXPORT_SYMBOL(clear_user_page);
Well, I think it would be a security issue to potentially leave garbage
icache content (possibly instructions from another process) accessible
to userspace. So I don't think we can avoid that one.
> void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
> struct page *pg)
> {
> copy_page(vto, vfrom);
>
> /*
> * We should be able to use the following optimisation, however
> * there are two problems.
> * Firstly a bug in some versions of binutils meant PLT sections
> * were not marked executable.
> * Secondly the first word in the GOT section is blrl, used
> * to establish the GOT address. Until recently the GOT was
> * not marked executable.
> * - Anton
> */
> #if 0
> if (!vma->vm_file && ((vma->vm_flags & VM_EXEC) == 0))
> return;
> #endif
Well, we try not to break userspace.... This doesn't affect newer CPUs
that much because they have CPU_FTR_COHERENT_ICACHE, so
flush_dcache_page is pretty much a nop on them.
Cheers,
Ben.
> flush_dcache_page(pg);
> }
>
> Christophe
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