powerpc: Expose TSCR via sysfs
patch-notifications at ellerman.id.au
Mon Jan 22 14:34:06 AEDT 2018
On Thu, 2017-09-07 at 17:11:12 UTC, Anton Blanchard wrote:
> From: Anton Blanchard <anton at samba.org>
> The thread switch control register (TSCR) is a per core register
> that configures how the CPU shares resources between SMT threads.
> Exposing it via sysfs allows us to tune it at run time.
> Signed-off-by: Anton Blanchard <anton at samba.org>
Applied to powerpc next, thanks.
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