[PATCH] PCI: Add #defines for Completion Timeout Disable feature

[Bjorn Helgaas]

On Fri, Dec 15, 2017 at 04:57:11PM -0600, Bjorn Helgaas wrote:
> From: Bjorn Helgaas <bhelgaas at google.com>
> 
> Add #defines for the Completion Timeout Disable feature and use them.  No
> functional change intended.
> 
> Signed-off-by: Bjorn Helgaas <bhelgaas at google.com>

Applied with Michael's ack to pci/misc for v4.16.

> ---
>  arch/powerpc/platforms/powernv/eeh-powernv.c |    6 +++---
>  include/uapi/linux/pci_regs.h                |    2 ++
>  2 files changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
> index 4650fb294e7a..2f7cd0ef3cdc 100644
> --- a/arch/powerpc/platforms/powernv/eeh-powernv.c
> +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
> @@ -1654,14 +1654,14 @@ static int pnv_eeh_restore_vf_config(struct pci_dn *pdn)
>  		eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
>  				      2, devctl);
>  
> -		/* Disable Completion Timeout */
> +		/* Disable Completion Timeout if possible */
>  		eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCAP2,
>  				     4, &cap2);
> -		if (cap2 & 0x10) {
> +		if (cap2 & PCI_EXP_DEVCAP2_COMP_TMOUT_DIS) {
>  			eeh_ops->read_config(pdn,
>  					     edev->pcie_cap + PCI_EXP_DEVCTL2,
>  					     4, &cap2);
> -			cap2 |= 0x10;
> +			cap2 |= PCI_EXP_DEVCTL2_COMP_TMOUT_DIS;
>  			eeh_ops->write_config(pdn,
>  					      edev->pcie_cap + PCI_EXP_DEVCTL2,
>  					      4, cap2);
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index 70c2b2ade048..9dc67643fc18 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -622,6 +622,7 @@
>   * safely.
>   */
>  #define PCI_EXP_DEVCAP2		36	/* Device Capabilities 2 */
> +#define  PCI_EXP_DEVCAP2_COMP_TMOUT_DIS	0x00000010 /* Completion Timeout Disable supported */
>  #define  PCI_EXP_DEVCAP2_ARI		0x00000020 /* Alternative Routing-ID */
>  #define  PCI_EXP_DEVCAP2_ATOMIC_ROUTE	0x00000040 /* Atomic Op routing */
>  #define PCI_EXP_DEVCAP2_ATOMIC_COMP64	0x00000100 /* Atomic 64-bit compare */
> @@ -631,6 +632,7 @@
>  #define  PCI_EXP_DEVCAP2_OBFF_WAKE	0x00080000 /* Re-use WAKE# for OBFF */
>  #define PCI_EXP_DEVCTL2		40	/* Device Control 2 */
>  #define  PCI_EXP_DEVCTL2_COMP_TIMEOUT	0x000f	/* Completion Timeout Value */
> +#define  PCI_EXP_DEVCTL2_COMP_TMOUT_DIS	0x0010	/* Completion Timeout Disable */
>  #define  PCI_EXP_DEVCTL2_ARI		0x0020	/* Alternative Routing-ID */
>  #define PCI_EXP_DEVCTL2_ATOMIC_REQ	0x0040	/* Set Atomic requests */
>  #define PCI_EXP_DEVCTL2_ATOMIC_EGRESS_BLOCK 0x0080 /* Block atomic egress */
>