[PATCH V2 0/4] Add support for 4PB virtual address space on hash

[Aneesh Kumar K.V]

On 02/26/2018 07:38 PM, Aneesh Kumar K.V wrote:
> This patch series extended the max virtual address space value from 512TB
> to 4PB with 64K page size. We do that by allocating one vsid context for
> each 512TB range. More details of that is explained in patch 3.
> 
> 
> Aneesh Kumar K.V (4):
>    powerpc/mm/slice: Update documentation in the file.
>    powerpc/mm/slice: Reduce the stack usage in slice_get_unmapped_area
>    powerpc/mm: Add support for handling > 512TB address in SLB miss
>    powerpc/mm/hash64: Increase the VA range
> 
>   arch/powerpc/include/asm/book3s/64/hash-4k.h  |   6 ++
>   arch/powerpc/include/asm/book3s/64/hash-64k.h |   7 +-
>   arch/powerpc/include/asm/book3s/64/mmu-hash.h |   6 +-
>   arch/powerpc/include/asm/book3s/64/mmu.h      |  24 +++++
>   arch/powerpc/include/asm/processor.h          |  16 ++-
>   arch/powerpc/kernel/exceptions-64s.S          |  12 ++-
>   arch/powerpc/mm/copro_fault.c                 |   2 +-
>   arch/powerpc/mm/hash_utils_64.c               |   4 +-
>   arch/powerpc/mm/init_64.c                     |   6 --
>   arch/powerpc/mm/mmu_context_book3s64.c        |  17 ++-
>   arch/powerpc/mm/pgtable-hash64.c              |   2 +-
>   arch/powerpc/mm/pgtable_64.c                  |   5 -
>   arch/powerpc/mm/slb.c                         | 150 ++++++++++++++++++++++++++
>   arch/powerpc/mm/slb_low.S                     |   6 +-
>   arch/powerpc/mm/slice.c                       |  61 ++++++-----
>   arch/powerpc/mm/tlb_hash64.c                  |   2 +-
>   16 files changed, 273 insertions(+), 53 deletions(-)
> 

Dependent patch

"[PATCH v5 1/6] powerpc/mm/slice: Remove intermediate bitmap copy"

https://marc.info/?l=linux-kernel&m=151930964805502&w=2

-aneesh