[PATCH V2 3/4] powerpc/mm/hash64: Store the slot information at the right offset.

Ram Pai linuxram at us.ibm.com
Mon Feb 12 09:39:07 AEDT 2018


On Sun, Feb 11, 2018 at 08:30:08PM +0530, Aneesh Kumar K.V wrote:
> The hugetlb pte entries are at the PMD and PUD level. Use the right offset
> for them to get the second half of the table.
> 
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar at linux.vnet.ibm.com>
> ---
>  arch/powerpc/include/asm/book3s/64/hash-4k.h  |  3 ++-
>  arch/powerpc/include/asm/book3s/64/hash-64k.h |  9 +++++----
>  arch/powerpc/include/asm/book3s/64/pgtable.h  |  2 +-
>  arch/powerpc/mm/hash64_4k.c                   |  4 ++--
>  arch/powerpc/mm/hash64_64k.c                  |  8 ++++----
>  arch/powerpc/mm/hugetlbpage-hash64.c          | 10 +++++++---
>  arch/powerpc/mm/tlb_hash64.c                  |  9 +++++++--
>  7 files changed, 28 insertions(+), 17 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h
> index 949d691094a4..67c5475311ee 100644
> diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c

....snip...

> index 881ebd53ffc2..9b23f12e863c 100644
> --- a/arch/powerpc/mm/tlb_hash64.c
> +++ b/arch/powerpc/mm/tlb_hash64.c
> @@ -51,7 +51,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
>  	unsigned int psize;
>  	int ssize;
>  	real_pte_t rpte;
> -	int i;
> +	int i, offset;
> 
>  	i = batch->index;
> 
> @@ -67,6 +67,10 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
>  		psize = get_slice_psize(mm, addr);
>  		/* Mask the address for the correct page size */
>  		addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1);
> +		if (unlikely(psize == MMU_PAGE_16G))
> +			offset = PTRS_PER_PUD;
> +		else
> +			offset = PTRS_PER_PMD;

I prefer to encapsulate this under some function/macro; somewhere in hugetlb.h, which returns
the offset given a mmu_size.  But no big deal..


Reviewed-by: Ram Pai <linuxram at us.ibm.com>

RP



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