[PATCH 1/2] powerpc/mm: Fix crashes with PUD level hugetlb config

[Aneesh Kumar K.V]

On 02/09/2018 12:59 AM, Ram Pai wrote:
> On Thu, Feb 08, 2018 at 08:46:27PM +0530, Aneesh Kumar K.V wrote:
>> "Aneesh Kumar K.V" <aneesh.kumar at linux.vnet.ibm.com> writes:
>>
>>> To support memory keys, we moved the hash pte slot information to the second
>>> half of the page table. This was ok with PTE entries at level 4 and level 3.
>>> We already allocate larger page table pages at those level to accomodate extra
>>> details. For level 4 we already have the extra space which was used to track
>>> 4k hash page table entry details and at pmd level the extra space was allocated
>>> to track the THP details.
>>>
>>> With hugetlbfs PTE, we used this extra space at the PMD level to store the
>>> slot details. But we also support hugetlbfs PTE at PUD leve and PUD level page
>>> didn't allocate extra space. This resulted in memory corruption.
>>>
>>> Fix this by allocating extra space at PUD level when HUGETLB is enabled. We
>>> may need further changes to allocate larger space at PMD level when we enable
>>> HUGETLB. That will be done in next patch.
>>>
>>> Fixes:bf9a95f9a6481bc6e(" powerpc: Free up four 64K PTE bits in 64K backed HPTE pages")
>>>
>>> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar at linux.vnet.ibm.com>
>>
>> Another fix, I still get random memory corruption with hugetlb test with
>> 16G hugepage config.
> 
> this fix may not be needed. It random corruption may be artifact of the typo you
> had in your first patch?

Why? the tables at level 2 and leve3 are of different size and we should 
use the right offset to store the slot details. Even with the change you 
mentioned in the previous mail, I still have kernel crashes with 
hugetlbfs test running in parallel to a kernel build.

-aneesh