[PATCH 1/2] powerpc/mm: Fix crashes with PUD level hugetlb config

Ram Pai linuxram at us.ibm.com
Fri Feb 9 06:22:01 AEDT 2018

On Thu, Feb 08, 2018 at 04:04:41PM +0530, Aneesh Kumar K.V wrote:
> To support memory keys, we moved the hash pte slot information to the second
> half of the page table. This was ok with PTE entries at level 4 and level 3.
> We already allocate larger page table pages at those level to accomodate extra
> details. For level 4 we already have the extra space which was used to track
> 4k hash page table entry details and at pmd level the extra space was allocated
> to track the THP details.
> With hugetlbfs PTE, we used this extra space at the PMD level to store the
> slot details. But we also support hugetlbfs PTE at PUD leve and PUD level page
> didn't allocate extra space. This resulted in memory corruption.
> Fix this by allocating extra space at PUD level when HUGETLB is enabled. We
> may need further changes to allocate larger space at PMD level when we enable
> HUGETLB. That will be done in next patch.
> Fixes:bf9a95f9a6481bc6e(" powerpc: Free up four 64K PTE bits in 64K backed HPTE pages")

hmm.. did not know that hugetlbs operated at the PUD level. Thanks for
catching this.

> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar at linux.vnet.ibm.com>
> ---
> NOTE: In the long run we may want to look at my patch series to remove slot
>  }
>  static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
> diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h
> index 51017726d495..3c14663d457d 100644
> --- a/arch/powerpc/include/asm/book3s/64/pgtable.h
> +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
> @@ -232,11 +232,13 @@ extern unsigned long __pmd_index_size;
>  extern unsigned long __pud_index_size;
>  extern unsigned long __pgd_index_size;
>  extern unsigned long __pmd_cache_index;
> +extern unsigned long __pud_cache_index;
>  #define PTE_INDEX_SIZE  __pte_index_size
>  #define PMD_INDEX_SIZE  __pmd_index_size
>  #define PUD_INDEX_SIZE  __pud_index_size
>  #define PGD_INDEX_SIZE  __pgd_index_size
>  #define PMD_CACHE_INDEX __pmd_cache_index
> +#define PUD_CACHE_INDEX __pmd_cache_index

This is a typo. Should be 'pud' not a 'pmd'.

#define PUD_CACHE_INDEX __pud_cache_index

>  /*
>   * Because of use of pte fragments and THP, size of page table


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