[v3, 3/3] powerpc/64s/idle: POWER9 ESL=0 stop avoid save/restore overhead

[Michael Ellerman]

On Sun, 2018-04-01 at 05:48:55 UTC, Nicholas Piggin wrote:
> When stop is executed with EC=ESL=0, it appears to execute like a
> normal instruction (resuming from NIP when woken by interrupt). So all
> the save/restore handling can be avoided completely. In particular NV
> GPRs do not have to be saved, and MSR does not have to be switched
> back to kernel MSR.
> 
> So move the test for EC=ESL=0 sleep states out to power9_idle_stop,
> and return directly to the caller after stop in that case.
> 
> This improves performance for ping-pong benchmark with the stop0_lite
> idle state by 2.54% for 2 threads in the same core, and 2.57% for
> different cores. Performance increase with HV_POSSIBLE defined will be
> improved further by avoiding the hwsync.
> 
> Cc: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
> Cc: Gautham R. Shenoy <ego at linux.vnet.ibm.com>
> Cc: Paul Mackerras <paulus at ozlabs.org>
> Signed-off-by: Nicholas Piggin <npiggin at gmail.com>

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/b9ee31e100e73075431faaf7af2ee0

cheers