[PATCH] cxl: Dump PSL_FIR register on PSL9 error irq

[Vaibhav Jain]

For PSL9 currently we aren't dumping the PSL FIR register when a
PSL error interrupt is triggered. Contents of this register are useful
in debugging AFU issues.

This patch fixes issue by updating the cxl_native_err_irq_dump_regs()
to dump the PSL_FIR registers on a PSL error interrupt thereby
bringing the behavior in line with PSL on POWER-8.

Signed-off-by: Vaibhav Jain <vaibhav at linux.vnet.ibm.com>
---
 drivers/misc/cxl/native.c | 17 ++++++++++++++---
 drivers/misc/cxl/pci.c    |  1 +
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 6cd57c756927..fa143bad9b55 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -1267,10 +1267,21 @@ void cxl_native_err_irq_dump_regs(struct cxl *adapter)
 {
 	u64 fir1, fir2;
 
-	fir1 = cxl_p1_read(adapter, CXL_PSL_FIR1);
-	fir2 = cxl_p1_read(adapter, CXL_PSL_FIR2);
+	if (cxl_is_power8()) {
+		fir1 = cxl_p1_read(adapter, CXL_PSL_FIR1);
+		fir2 = cxl_p1_read(adapter, CXL_PSL_FIR2);
+		dev_crit(&adapter->dev,
+			 "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n",
+			 fir1, fir2);
+
+	} else if (cxl_is_power9()) {
+		fir1 = cxl_p1_read(adapter, CXL_PSL9_FIR1);
+		dev_crit(&adapter->dev, "PSL_FIR: 0x%016llx\n", fir1);
+
+	} else {
+		WARN_ON(1);
+	}
 
-	dev_crit(&adapter->dev, "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n", fir1, fir2);
 }
 
 static irqreturn_t native_irq_err(int irq, void *data)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index b4ce9ea113a9..d9d6777fa853 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1763,6 +1763,7 @@ static const struct cxl_service_layer_ops psl9_ops = {
 	.debugfs_add_adapter_regs = cxl_debugfs_add_adapter_regs_psl9,
 	.debugfs_add_afu_regs = cxl_debugfs_add_afu_regs_psl9,
 	.psl_irq_dump_registers = cxl_native_irq_dump_regs_psl9,
+	.err_irq_dump_registers = cxl_native_err_irq_dump_regs,
 	.debugfs_stop_trace = cxl_stop_trace_psl9,
 	.write_timebase_ctrl = write_timebase_ctrl_psl9,
 	.timebase_read = timebase_read_psl9,
-- 
2.13.6