[PATCH V2 00/11] powerpc/mm/hash: Cleanup and fixes
Aneesh Kumar K.V
aneesh.kumar at linux.vnet.ibm.com
Thu Mar 16 21:31:58 AEDT 2017
Hi,
This series collect all the different patches sent before into one patch series.
The patch series is also rebased on top of latest upstream linus.
It also contain fixes to the patches posted earlier.
Aneesh Kumar K.V (11):
powerpc/mm/nohash: MM_SLICE is only used by book3s 64
powerpc/mm/slice: when computing slice mask limit lowe slice max addr
correctly
powerpc/mm: Cleanup bits definition between hash and radix.
powerpc/mm/radix: rename _PAGE_LARGE to R_PAGE_LARGE
powerpc/mm: Add translation mode information in /proc/cpuinfo
powerpc/mm/hugetlb: Filter out hugepage size not supported by page
table layout
powerpc/mm: Conditional defines of pte bits are messy
powerpc/mm: Express everything based on Radix page table defines
powerpc/mm: Lower the max real address to 51 bits
powerpc/mm/radix: Make max pfn bits a variable
powerpc/mm: Move hash specific pte bits to be top bits of RPN
arch/powerpc/include/asm/book3s/64/hash-64k.h | 8 ++++--
arch/powerpc/include/asm/book3s/64/hash.h | 35 ++++++++++++++++--------
arch/powerpc/include/asm/book3s/64/hugetlb.h | 2 +-
arch/powerpc/include/asm/book3s/64/pgtable.h | 39 ++++++++++++++++-----------
arch/powerpc/include/asm/book3s/64/radix.h | 12 ++++++++-
arch/powerpc/include/asm/mmu-book3e.h | 5 ----
arch/powerpc/include/asm/nohash/64/pgtable.h | 5 ----
arch/powerpc/mm/hash_native_64.c | 1 +
arch/powerpc/mm/hash_utils_64.c | 1 +
arch/powerpc/mm/hugetlbpage-book3e.c | 7 -----
arch/powerpc/mm/hugetlbpage.c | 20 ++++++++++++++
arch/powerpc/mm/mmu_context_nohash.c | 5 ----
arch/powerpc/mm/pgtable-radix.c | 1 +
arch/powerpc/mm/pgtable_64.c | 3 +++
arch/powerpc/mm/slice.c | 5 ++--
arch/powerpc/mm/tlb-radix.c | 2 +-
arch/powerpc/platforms/Kconfig.cputype | 2 +-
arch/powerpc/platforms/powernv/setup.c | 4 +++
arch/powerpc/platforms/pseries/setup.c | 4 +++
19 files changed, 103 insertions(+), 58 deletions(-)
--
2.7.4
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