[PATCH v2] powerpc: A new cache geometry aux vectors

Segher Boessenkool segher at kernel.crashing.org
Mon Mar 6 19:24:06 AEDT 2017


On Mon, Mar 06, 2017 at 04:46:46PM +1100, Michael Ellerman wrote:
> Hmm, which p9 mambo is this? I get:
> 
> test: cache_shape
> tags: git_version:v4.10-10927-g0a55d1671c33
> L1I  cache size:     0x8000      32768B         32K
> L1I  line size:        0x80       128-way associative
> L1D  cache size:     0x8000      32768B         32K
> L1D  line size:        0x80       128-way associative
> L2   cache size:          0          0B          0K
> L2   line size:           0       fully associative
> L3   cache size:          0          0B          0K
> L3   line size:           0       fully associative
> success: cache_shape
> 
> So that looks OK, other than that here is no L2/L3 info.

128 ways?  Looks okay?  Erm...


Segher


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