[PATCH] POWER9 PMU stops after idle workaround

[Vaidyanathan Srinivasan]

* Nicholas Piggin <npiggin at gmail.com> [2017-07-20 11:53:22]:

> POWER9 DD2 PMU can stop after a state-loss idle in some conditions.
> 
> A solution is to set then clear MMCRA[60] after wake from state-loss
> idle.
> 
> Signed-off-by: Nicholas Piggin <npiggin at gmail.com>

Reviewed-by: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>


> ---
>  arch/powerpc/kernel/idle_book3s.S | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
> index 516ebef905c0..e6252c5a57a4 100644
> --- a/arch/powerpc/kernel/idle_book3s.S
> +++ b/arch/powerpc/kernel/idle_book3s.S
> @@ -460,11 +460,17 @@ pnv_restore_hyp_resource_arch300:
>  	/*
>  	 * Workaround for POWER9, if we lost resources, the ERAT
>  	 * might have been mixed up and needs flushing. We also need
> -	 * to reload MMCR0 (see comment above).
> +	 * to reload MMCR0 (see comment above). We also need to set
> +	 * then clear bit 60 in MMCRA to ensure the PMU starts running.
>  	 */
>  	blt	cr3,1f
>  	PPC_INVALIDATE_ERAT
>  	ld	r1,PACAR1(r13)
> +	mfspr	r4,SPRN_MMCRA
> +	ori	r4,r4,(1 << (63-60))
> +	mtspr	SPRN_MMCRA,r4
> +	xori	r4,r4,(1 << (63-60))
> +	mtspr	SPRN_MMCRA,r4


Timing is ok to resolve the issue?  Does back-to-back bit flip of
MMCRA[60] gets the job done for all cases?  Just asking since this
issue in itself is a corner case ;)

--Vaidy