[v6, 01/10] powerpc/pseries: Fix passing of pp0 in updatepp() and updateboltedpp()
Michael Ellerman
patch-notifications at ellerman.id.au
Tue Jul 4 20:48:35 AEST 2017
On Mon, 2017-07-03 at 13:01:45 UTC, Michael Ellerman wrote:
> From: Balbir Singh <bsingharora at gmail.com>
>
> Once upon a time there were only two PP (page protection) bits. In ISA
> 2.03 an additional PP bit was added, but because of the layout of the
> HPTE it could not be made contiguous with the existing PP bits.
>
> The result is that we now have three PP bits, named pp0, pp1, pp2,
> where pp0 occupies bit 63 of dword 1 of the HPTE and pp1 and pp2
> occupy bits 1 and 0 respectively. Until recently Linux hasn't used
> pp0, however with the addition of _PAGE_KERNEL_RO we started using it.
>
> The problem arises in the LPAR code, where we need to translate the PP
> bits into the argument for the H_PROTECT hypercall. Currently the code
> only passes bits 0-2 of newpp, which covers pp1, pp2 and N (no
> execute), meaning pp0 is not passed to the hypervisor at all.
>
> We can't simply pass it through in bit 63, as that would collide with a
> different field in the flags argument, as defined in PAPR. Instead we
> have to shift it down to bit 8 (IBM bit 55).
>
> Fixes: e58e87adc8bf ("powerpc/mm: Update _PAGE_KERNEL_RO")
> Cc: stable at vger.kernel.org # v4.7+
> Signed-off-by: Balbir Singh <bsingharora at gmail.com>
> [mpe: Simplify the test, rework change log]
> Signed-off-by: Michael Ellerman <mpe at ellerman.id.au>
Series applied to powerpc next.
https://git.kernel.org/powerpc/c/e71ff982ae4c17d176e9f0132157d5
cheers
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