[PATCH 9/9] powerpc: A new cache shape aux vectors

Tulio Magno Quites Machado Filho tuliom at linux.vnet.ibm.com
Thu Jan 5 22:15:47 AEDT 2017


Benjamin Herrenschmidt <benh at kernel.crashing.org> writes:

> On Wed, 2017-01-04 at 11:04 -0200, Tulio Magno Quites Machado Filho
>
>> > +#define AT_L1I_CACHESIZE	40
>> > +#define AT_L1I_CACHESHAPE	41
>> > +#define AT_L1D_CACHESIZE	42
>> > +#define AT_L1D_CACHESHAPE	43
>> > +#define AT_L2_CACHESIZE		44
>> > +#define AT_L2_CACHESHAPE	45
>> > +#define AT_L3_CACHESIZE		46
>> > +#define AT_L3_CACHESHAPE	47
>> 
>> These names will clash with the other ones defined by alpha and sh:
>> 
>> /* Shapes of the caches.  Bits 0-3 contains associativity; bits 4-7
>> contains
>>    log2 of line size; mask those to get cache size.  */
>> #define AT_L1I_CACHESHAPE	34
>> #define AT_L1D_CACHESHAPE	35
>> #define AT_L2_CACHESHAPE	36
>> #define AT_L3_CACHESHAPE	37
>
> Is this a problem though ? In the kernel at least these are defined in
> arch specific headers so there is no clash.

It could become a problem if an architecture tries to use both of these
types.

glibc doesn't distinct between them:
https://sourceware.org/git/?p=glibc.git;a=blob;f=elf/elf.h#l1113

> Otherwise, I can change them to *_CACHEGEOMETRY, is that ok ?

Looks good to me.

-- 
Tulio Magno



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