[PATCH] powerpc/perf: use MSR to report privilege level on P9 DD1
Madhavan Srinivasan
maddy at linux.vnet.ibm.com
Tue Jan 3 20:13:13 AEDT 2017
"use_siar" variable is primarily used for deciding the sampled address
and the privilege level to be reported for a sample. perf_read_regs()
function updates the "use_siar" and "regs->result" based on the pmu
flags along with other checks. To force the use of MSR to report the
privilege level and to use "regs->nip" to report the instruction pointer,
set "PPMU_NO_CONT_SAMPLING" flag and remove "PPMU_HAS_SIER" from the
ppmu->flags.
Signed-off-by: Madhavan Srinivasan <maddy at linux.vnet.ibm.com>
---
arch/powerpc/perf/power9-pmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c
index a46ef29e50e7..06b7e8ebd29a 100644
--- a/arch/powerpc/perf/power9-pmu.c
+++ b/arch/powerpc/perf/power9-pmu.c
@@ -403,7 +403,7 @@ static struct power_pmu power9_isa207_pmu = {
.bhrb_filter_map = power9_bhrb_filter_map,
.get_constraint = isa207_get_constraint,
.disable_pmc = isa207_disable_pmc,
- .flags = PPMU_HAS_SIER | PPMU_ARCH_207S,
+ .flags = PPMU_NO_CONT_SAMPLING | PPMU_ARCH_207S,
.n_generic = ARRAY_SIZE(power9_generic_events),
.generic_events = power9_generic_events,
.cache_events = &power9_cache_events,
--
2.7.4
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