[PATCH 1/3] powerpc/mm/radix: Update pte update sequence for pte clear case
Aneesh Kumar K.V
aneesh.kumar at linux.vnet.ibm.com
Thu Feb 9 15:34:51 AEDT 2017
Benjamin Herrenschmidt <benh at kernel.crashing.org> writes:
> On Thu, 2017-02-09 at 14:49 +1100, Benjamin Herrenschmidt wrote:
>> On Thu, 2017-02-09 at 08:28 +0530, Aneesh Kumar K.V wrote:
>> > In the kernel we do follow the below sequence in different code
>> > paths.
>> > pte = ptep_get_clear(ptep)
>> > ....
>> > set_pte_at(ptep, pte)
>> > We do that for mremap, autonuma protection update and softdirty
>> > clearing. This
>> > implies our optimization to skip a tlb flush when clearing a pte
>> > update is
>> > not valid, because for DD1 system that followup set_pte_at will be
>> > done witout
>> > doing the required tlbflush. Fix that by always doing the dd1 style
>> > pte update
>> > irrespective of new_pte value. In a later patch we will optimize
>> > the application
>> > exit case.
>> What about my change to set_pte_at() ? We seem to be overwriting
>> valid PTEs,
>> shouldn't we deal with that ?
> So the HW guys confirmed that the TLB will never cache a valid entry
> that has all permissions clear. That leaves the THP write problem
Which is fixed by the autonuma related changes posted at
Right now i am running a kernel compile in loop with parallel perf
bench numa mem run to make sure we got most of the details correct.
(this is on p8)
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