[PATCH] cxl: Set the valid bit in PE for dedicated mode
Michael Ellerman
mpe at ellerman.id.au
Tue Aug 29 16:53:52 AEST 2017
Vaibhav Jain <vaibhav at linux.vnet.ibm.com> writes:
> Make sure to set the valid-bit in software-state field of the
> populated PE. This was earlier missing for dedicated mode AFUs, hence
> was causing a PSL freeze when the AFU was activated.
>
> Signed-off-by: Vaibhav Jain <vaibhav at linux.vnet.ibm.com>
> ---
> drivers/misc/cxl/native.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
> index 4a82c313cf71..0e748c682ee9 100644
> --- a/drivers/misc/cxl/native.c
> +++ b/drivers/misc/cxl/native.c
> @@ -897,6 +897,10 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context *ctx, u64 wed, u64 amr)
> if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
> afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);
>
> + ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);
> + /* Make sure the changes to the PE are visible to the card */
A barrier orders something vs something else. So what's the something
else in this case? Is it the afu_reset() below, what does that actually do?
> + smp_wmb();
> +
> result = cxl_ops->afu_reset(afu);
> if (result)
> return result;
cheers
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