[PATCH RFC 0/7] powerpc: Beef up single-stepping/instruction emulation infrastructure

[Michael Ellerman]

Michael Neuling <mikey at neuling.org> writes:

> Paulus, 
>
>> This patch series extends the code in arch/powerpc/lib/sstep.c so that
>> it handles almost all load and store instructions -- all except the
>> atomic memory operations (lwat, stwat, etc.).  It also makes sure that
>> we use the largest possible aligned accesses to access memory and that
>> we don't access the CPU FP/VMX/VSX registers when they don't contain
>> user data.
>
> Do you have any test cases we can put in selftests for this?

We have lots of plans for them, but no code yet.

cheers