[RFC Part1 PATCH v3 07/17] x86/mm: Include SEV for encryption memory attribute changes

Tom Lendacky thomas.lendacky at amd.com
Fri Aug 18 04:10:45 AEST 2017


On 7/27/2017 9:58 AM, Borislav Petkov wrote:
> On Mon, Jul 24, 2017 at 02:07:47PM -0500, Brijesh Singh wrote:
>> From: Tom Lendacky <thomas.lendacky at amd.com>
>>
>> The current code checks only for sme_active() when determining whether
>> to perform the encryption attribute change.  Include sev_active() in this
>> check so that memory attribute changes can occur under SME and SEV.
>>
>> Signed-off-by: Tom Lendacky <thomas.lendacky at amd.com>
>> Signed-off-by: Brijesh Singh <brijesh.singh at amd.com>
>> ---
>>   arch/x86/mm/pageattr.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
>> index dfb7d65..b726b23 100644
>> --- a/arch/x86/mm/pageattr.c
>> +++ b/arch/x86/mm/pageattr.c
>> @@ -1781,8 +1781,8 @@ static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc)
>>   	unsigned long start;
>>   	int ret;
>>   
>> -	/* Nothing to do if the SME is not active */
>> -	if (!sme_active())
>> +	/* Nothing to do if SME and SEV are not active */
>> +	if (!sme_active() && !sev_active())
> 
> This is the second place which does
> 
> 	if (!SME && !SEV)
> 
> I wonder if, instead of sprinking those, we should have a
> 
> 	if (mem_enc_active())
> 
> or so which unifies all those memory encryption logic tests and makes
> the code more straightforward for readers who don't have to pay
> attention to SME vs SEV ...

Yup, that will make things look cleaner and easier to understand.

Thanks,
Tom

> 
> Just a thought.
> 


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